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+643
@@ -0,0 +1,643 @@
|
||||
# nvram for bcm94390f10rfem board.
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390f10rfem 10x10 P101 ref board
|
||||
#SSID: 0x0ac0
|
||||
#macmid: 0x0555
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Proprietary:>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
# All svn keyword entries must come before this comment. Any change within four
|
||||
# lines of an svn keyword line will cause patching errors in precommit.
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1101
|
||||
boardtype=0x0ac0
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002100
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:12:d0:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=17
|
||||
rxgains2gtrisoa0=19
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=16
|
||||
rxgains5gtrisoa0=19
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=16
|
||||
rxgains5gmtrisoa0=19
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=16
|
||||
rxgains5ghtrisoa0=19
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=17
|
||||
rxgains2gtrisoa1=19
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=16
|
||||
rxgains5gtrisoa1=19
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=16
|
||||
rxgains5gmtrisoa1=19
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=16
|
||||
rxgains5ghtrisoa1=19
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=1
|
||||
rxgains2gfelossa1=1
|
||||
rxgains5gfelossa0=0
|
||||
rxgains5gfelossa1=0
|
||||
rxgains5gmfelossa0=0
|
||||
rxgains5gmfelossa1=0
|
||||
rxgains5ghfelossa0=0
|
||||
rxgains5ghfelossa1=0
|
||||
|
||||
rxgains6gelnagaina0=16
|
||||
rxgains6gtrisoa0=19
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=16
|
||||
rxgains6gmtrisoa0=19
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=16
|
||||
rxgains6ghtrisoa0=19
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=2
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=16
|
||||
rxgains6gtrisoa1=19
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=16
|
||||
rxgains6gmtrisoa1=19
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=16
|
||||
rxgains6ghtrisoa1=19
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=2
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gl=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gml=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gmu=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gh=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb5=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
#RSSI compensation parameters for 2G FBC and 5G/6G scan core in qdBm
|
||||
rssi_delta_2gb0_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb1_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb2_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb3_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb4_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm5g_c0=0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm6g_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
gain_cal_temp=36
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
#cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=4
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_bandedge_2g_en=1
|
||||
slice/1/fdss_profile_2g=7,0,0,16,20,28,36,44,48,169,-500,-590,70,0,-70,590,500,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
|
||||
slice/1/fdss_profile_2g_ch1=7,0,0,16,20,28,36,44,48,165,-470,-200,80,135,-130,620,320,128
|
||||
slice/1/fdss_profile_11ax_2g_ch1=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
|
||||
slice/1/fdss_profile_2g_ch11=7,0,0,16,20,28,36,44,48,184,-470,-150,100,-100,-50,300,500,128
|
||||
slice/1/fdss_profile_11ax_2g_ch11=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
|
||||
slice/1/fdss_profile_2g_ch13=7,0,0,16,21,28,36,43,48,169,-450,170,500,-616,-70,460,250,128
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
slice/1/txshaper_en=1
|
||||
slice/1/txshaper_en_mfg=1
|
||||
slice/1/txs_rate_chan_profile=1
|
||||
slice/1/txshaper_en_11ax=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=0
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=0
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=474,474,400,400
|
||||
AvVmid_c0=0,179,0,179,0,176,0,193,0,193
|
||||
AvVmid_c1=0,165,0,165,0,166,0,180,0,180
|
||||
AvVmid_6g_c0=0,188,0,188,0,190,0,192,0,194,0,195
|
||||
AvVmid_6g_c1=0,180,0,181,0,181,0,184,0,185,0,190
|
||||
slice/1/AvVmid_c0=0,154
|
||||
slice/1/AvVmid_c1=0,146
|
||||
|
||||
pacalver_nvram=0x3
|
||||
slice/1/pa2ga0=-16,6713,-1020
|
||||
slice/1/pa2ga1=53,6952,-1040
|
||||
pa5ga0=48,8231,-1211,49,8223,-1214,49,8339,-1203,19,7888,-1169
|
||||
pa5ga1=22,7770,-1181,44,8032,-1200,50,8010,-1182,28,7726,-1165
|
||||
pa6ga0=16,7545,-1162,26,7495,-1155,35,7569,-1157,54,7792,-1174,48,7667,-1178,59,7745,-1187
|
||||
pa6ga1=49,7737,-1180,59,7767,-1177,63,7717,-1174,59,7765,-1169,99,7916,-1198,57,7677,-1184
|
||||
|
||||
# Max power and offsets
|
||||
slice/1/powoffs2gtna0=-2,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=-2,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
#slice/1/pdoffsetcckma0=1
|
||||
#slice/1/pdoffsetcckma1=1
|
||||
|
||||
maxp2ga0=74
|
||||
maxp2ga1=74
|
||||
maxp5ga0=76,76,76,76
|
||||
maxp5ga1=76,76,76,76
|
||||
maxp6ga0=76,76,76,76,76,76
|
||||
maxp6ga1=76,76,76,76,76,76
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
slice/1/cckpwroffset0=0x6
|
||||
slice/1/cckpwroffset1=0x6
|
||||
pdoffset40ma0=0x5555
|
||||
pdoffset40ma1=0x5555
|
||||
pdoffset80ma0=0x5555
|
||||
pdoffset80ma1=0x5555
|
||||
pdoffset160ma0=0x7777
|
||||
pdoffset160ma1=0x7777
|
||||
pdoffset6g40ma0=0x555555
|
||||
pdoffset6g40ma1=0x555555
|
||||
pdoffset6g80ma0=0x555555
|
||||
pdoffset6g80ma1=0x555555
|
||||
pdoffset6g160ma0=0x777777
|
||||
pdoffset6g160ma1=0x777777
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0
|
||||
mcsbw202gpo=0x97432100
|
||||
dot11agofdmhrbw202gpo=0x21200
|
||||
ofdmlrbw202gpo=0x0000
|
||||
mcsbw205glpo=0x98531000
|
||||
mcsbw405glpo=0xa8642111
|
||||
mcsbw805glpo=0xa8753222
|
||||
mcsbw1605glpo=0xa8753222
|
||||
mcsbw205gmpo=0x98531000
|
||||
mcsbw405gmpo=0xa8642111
|
||||
mcsbw805gmpo=0xa8753222
|
||||
mcsbw1605gmpo=0xa8753222
|
||||
mcsbw205ghpo=0x98531000
|
||||
mcsbw405ghpo=0xa8642111
|
||||
mcsbw805ghpo=0xa8753222
|
||||
mcsbw1605ghpo=0xa8753222
|
||||
mcs1024qam5glpo=0xEEEECCCC
|
||||
mcs1024qam5gmpo=0xEEEECCCC
|
||||
mcs1024qam5ghpo=0xEEEECCCC
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
mcs10poexp=0
|
||||
mcs11poexp=0
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0x98531000
|
||||
mcsbw406gb1po=0xa8642111
|
||||
mcsbw806gb1po=0xa8753222
|
||||
mcsbw1606gb1po=0xa8753222
|
||||
mcsbw206gb2po=0x98531000
|
||||
mcsbw406gb2po=0xa8642111
|
||||
mcsbw806gb2po=0xa8753222
|
||||
mcsbw1606gb2po=0xa8753222
|
||||
mcsbw206gb3po=0x98531000
|
||||
mcsbw406gb3po=0xa8642111
|
||||
mcsbw806gb3po=0xa8753222
|
||||
mcsbw1606gb3po=0xa8753222
|
||||
mcsbw206gb4po=0x98531000
|
||||
mcsbw406gb4po=0xa8642111
|
||||
mcsbw806gb4po=0xa8753222
|
||||
mcsbw1606gb4po=0xa8753222
|
||||
mcsbw206gb5po=0x98531000
|
||||
mcsbw406gb5po=0xa8642111
|
||||
mcsbw806gb5po=0xa8753222
|
||||
mcsbw1606gb5po=0xa8753222
|
||||
mcsbw206gb6po=0x98531000
|
||||
mcsbw406gb6po=0xa8642111
|
||||
mcsbw806gb6po=0xa8753222
|
||||
mcsbw1606gb6po=0xa8753222
|
||||
mcs1024qam6gb1po=0xEEEECCCC
|
||||
mcs1024qam6gb2po=0xEEEECCCC
|
||||
mcs1024qam6gb3po=0xEEEECCCC
|
||||
mcs1024qam6gb4po=0xEEEECCCC
|
||||
mcs1024qam6gb5po=0xEEEECCCC
|
||||
mcs1024qam6gb6po=0xEEEECCCC
|
||||
|
||||
## ULOFDMA Board limit PPRs for 6G20 ##
|
||||
ruppr6g20bpska0=0x83FE
|
||||
ruppr6g20bpska1=0x83FE
|
||||
ruppr6g20qpska0=0x18820
|
||||
ruppr6g20qpska1=0x18820
|
||||
ruppr6g20qam16a0=0x29062
|
||||
ruppr6g20qam16a1=0x29062
|
||||
ruppr6g20qam64a0=0x398A4
|
||||
ruppr6g20qam64a1=0x398A4
|
||||
ruppr6g20qam256a0=0x6B16A
|
||||
ruppr6g20qam256a1=0x6B16A
|
||||
ruppr6g20qam1024a0=0x7B9AC
|
||||
ruppr6g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G40 ##
|
||||
ruppr6g40bpska0=0x2083FE
|
||||
ruppr6g40bpska1=0x2083FE
|
||||
ruppr6g40qpska0=0x418820
|
||||
ruppr6g40qpska1=0x418820
|
||||
ruppr6g40qam16a0=0x629062
|
||||
ruppr6g40qam16a1=0x629062
|
||||
ruppr6g40qam64a0=0x8398A4
|
||||
ruppr6g40qam64a1=0x8398A4
|
||||
ruppr6g40qam256a0=0xE6B16A
|
||||
ruppr6g40qam256a1=0xE6B16A
|
||||
ruppr6g40qam1024a0=0x107B9AC
|
||||
ruppr6g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G80 ##
|
||||
ruppr6g80bpska0=0x102083FE
|
||||
ruppr6g80bpska1=0x102083FE
|
||||
ruppr6g80qpska0=0x18418820
|
||||
ruppr6g80qpska1=0x18418820
|
||||
ruppr6g80qam16a0=0x20629062
|
||||
ruppr6g80qam16a1=0x20629062
|
||||
ruppr6g80qam64a0=0x288398A4
|
||||
ruppr6g80qam64a1=0x288398A4
|
||||
ruppr6g80qam256a0=0x40E6B16A
|
||||
ruppr6g80qam256a1=0x40E6B16A
|
||||
ruppr6g80qam1024a0=0x4907B9AC
|
||||
ruppr6g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G160 ##
|
||||
ruppr6g160bpska0=0x102083FE
|
||||
ruppr6g160bpska1=0x102083FE
|
||||
ruppr6g160qpska0=0x18418820
|
||||
ruppr6g160qpska1=0x18418820
|
||||
ruppr6g160qam16a0=0x20629062
|
||||
ruppr6g160qam16a1=0x20629062
|
||||
ruppr6g160qam64a0=0x288398A4
|
||||
ruppr6g160qam64a1=0x288398A4
|
||||
ruppr6g160qam256a0=0x40E6B16A
|
||||
ruppr6g160qam256a1=0x40E6B16A
|
||||
ruppr6g160qam1024a0=0x4907B9AC
|
||||
ruppr6g160qam1024a1=0x4907B9AC
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,-12
|
||||
mppc_gaindelta_pa1=0,46,45,45,45,46,45,47,46,48,45
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x80808181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008282, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x1
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-72,-72
|
||||
ed_thresh_sec5g=-72
|
||||
ed_thresh_sec6g=-72,-72
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-63
|
||||
eu_edthresh5g=-72
|
||||
eu_edthresh6g=-72,-72
|
||||
eu_edthresh_sec5g=-72
|
||||
eu_edthresh_sec6g=-72,-72
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossTx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
felossTx5ga0=0,0,0,0
|
||||
felossTx5ga1=0,0,0,0
|
||||
felossRx5ga0=0,0,0,0
|
||||
felossRx5ga1=0,0,0,0
|
||||
felossTx6ga0=0,0,0,0,0,0
|
||||
felossTx6ga1=0,0,0,0,0,0
|
||||
felossRx6ga0=0,0,0,0,0,0
|
||||
felossRx6ga1=0,0,0,0,0,0
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2G20 ##
|
||||
ruppr2g20bpska0=0x83FE
|
||||
ruppr2g20bpska1=0x83FE
|
||||
ruppr2g20qpska0=0x18820
|
||||
ruppr2g20qpska1=0x18820
|
||||
ruppr2g20qam16a0=0x29062
|
||||
ruppr2g20qam16a1=0x29062
|
||||
ruppr2g20qam64a0=0x398A4
|
||||
ruppr2g20qam64a1=0x398A4
|
||||
ruppr2g20qam256a0=0x7B9AC
|
||||
ruppr2g20qam256a1=0x7B9AC
|
||||
ruppr2g20qam1024a0=0x83DCD
|
||||
ruppr2g20qam1024a1=0x83DCD
|
||||
## ULOFDMA Board limit PPRs for 5G20 ##
|
||||
ruppr5g20bpska0=0x83FE
|
||||
ruppr5g20bpska1=0x83FE
|
||||
ruppr5g20qpska0=0x18820
|
||||
ruppr5g20qpska1=0x18820
|
||||
ruppr5g20qam16a0=0x29062
|
||||
ruppr5g20qam16a1=0x29062
|
||||
ruppr5g20qam64a0=0x398A4
|
||||
ruppr5g20qam64a1=0x398A4
|
||||
ruppr5g20qam256a0=0x6B16A
|
||||
ruppr5g20qam256a1=0x6B16A
|
||||
ruppr5g20qam1024a0=0x7B9AC
|
||||
ruppr5g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G40 ##
|
||||
ruppr5g40bpska0=0x2083FE
|
||||
ruppr5g40bpska1=0x2083FE
|
||||
ruppr5g40qpska0=0x418820
|
||||
ruppr5g40qpska1=0x418820
|
||||
ruppr5g40qam16a0=0x629062
|
||||
ruppr5g40qam16a1=0x629062
|
||||
ruppr5g40qam64a0=0x8398A4
|
||||
ruppr5g40qam64a1=0x8398A4
|
||||
ruppr5g40qam256a0=0xE6B16A
|
||||
ruppr5g40qam256a1=0xE6B16A
|
||||
ruppr5g40qam1024a0=0x107B9AC
|
||||
ruppr5g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G80 ##
|
||||
ruppr5g80bpska0=0x102083FE
|
||||
ruppr5g80bpska1=0x102083FE
|
||||
ruppr5g80qpska0=0x18418820
|
||||
ruppr5g80qpska1=0x18418820
|
||||
ruppr5g80qam16a0=0x20629062
|
||||
ruppr5g80qam16a1=0x20629062
|
||||
ruppr5g80qam64a0=0x288398A4
|
||||
ruppr5g80qam64a1=0x288398A4
|
||||
ruppr5g80qam256a0=0x40E6B16A
|
||||
ruppr5g80qam256a1=0x40E6B16A
|
||||
ruppr5g80qam1024a0=0x4907B9AC
|
||||
ruppr5g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G160 ##
|
||||
ruppr5g160bpska0=0x102083FE
|
||||
ruppr5g160bpska1=0x102083FE
|
||||
ruppr5g160qpska0=0x18418820
|
||||
ruppr5g160qpska1=0x18418820
|
||||
ruppr5g160qam16a0=0x20629062
|
||||
ruppr5g160qam16a1=0x20629062
|
||||
ruppr5g160qam64a0=0x288398A4
|
||||
ruppr5g160qam64a1=0x288398A4
|
||||
ruppr5g160qam256a0=0x40E6B16A
|
||||
ruppr5g160qam256a1=0x40E6B16A
|
||||
ruppr5g160qam1024a0=0x4907B9AC
|
||||
ruppr5g160qam1024a1=0x4907B9AC
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
lesi_desoffset_20MHzextra=1,1,1
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
|
||||
## List of duty cycle temperature thresholds in descending order (num = 3)
|
||||
tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/tvpm_dc_temp_threshold=110,105,100
|
||||
+679
@@ -0,0 +1,679 @@
|
||||
# nvram for bcm94390b0f10rfem board.
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390f10rfem B0 10x10 P200 ref board B0 bFEM
|
||||
#SSID: 0x0af3
|
||||
#macmid: 0x0596
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Proprietary:>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
# All svn keyword entries must come before this comment. Any change within four
|
||||
# lines of an svn keyword line will cause patching errors in precommit.
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1200
|
||||
boardtype=0x0af3
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002100
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:12:d0:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=16
|
||||
rxgains2gtrisoa0=17
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=15
|
||||
rxgains5gtrisoa0=17
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=15
|
||||
rxgains5gmtrisoa0=17
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=15
|
||||
rxgains5ghtrisoa0=17
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=16
|
||||
rxgains2gtrisoa1=17
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=15
|
||||
rxgains5gtrisoa1=17
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=15
|
||||
rxgains5gmtrisoa1=17
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=15
|
||||
rxgains5ghtrisoa1=17
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=2
|
||||
rxgains2gfelossa1=2
|
||||
rxgains5gfelossa0=2
|
||||
rxgains5gfelossa1=2
|
||||
rxgains5gmfelossa0=1
|
||||
rxgains5gmfelossa1=1
|
||||
rxgains5ghfelossa0=1
|
||||
rxgains5ghfelossa1=1
|
||||
rxgains5gbkoffa0=9
|
||||
rxgains5gbkoffa1=9
|
||||
|
||||
rxgains6gelnagaina0=15
|
||||
rxgains6gtrisoa0=17
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=15
|
||||
rxgains6gmtrisoa0=17
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=15
|
||||
rxgains6ghtrisoa0=17
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=1
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=15
|
||||
rxgains6gtrisoa1=17
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=15
|
||||
rxgains6gmtrisoa1=17
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=15
|
||||
rxgains6ghtrisoa1=17
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=1
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related for dedicated mode in qdBm
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=6,5,7,5,6,5,7,5,7,5,7,5,7,5,7,5
|
||||
rssi_delta_2gb1=6,4,7,5,6,4,7,5,7,4,8,6,7,4,8,6
|
||||
rssi_delta_2gb2=6,5,7,6,6,5,7,6,5,5,5,3,5,5,5,3
|
||||
rssi_delta_2gb3=10,7,11,10,10,7,11,10,11,5,12,10,11,5,12,10
|
||||
rssi_delta_2gb4=8,7,10,9,8,7,10,9,9,7,10,8,9,7,10,8
|
||||
rssi_delta_5gl=-6,4,-4,-3,-6,4,-4,-3,-6,4,-4,-3,-6,4,-4,-3,-6,5,-3,-1,-6,5,-3,-1,-6,5,-3,-1,-6,5,-3,-1
|
||||
rssi_delta_5gml=-2,10,3,3,-2,10,3,3,-2,10,3,3,-2,10,3,3,-1,12,4,5,-1,12,4,5,-1,12,4,5,-1,12,4,5
|
||||
rssi_delta_5gmu=-1,12,4,5,-1,12,4,5,-1,12,4,5,-1,12,4,5,1,14,7,7,1,14,7,7,1,14,7,7,1,14,7,7
|
||||
rssi_delta_5gh=1,14,6,7,1,14,6,7,1,14,6,7,1,14,6,7,2,17,9,10,2,17,9,10,2,17,9,10,2,17,9,10
|
||||
rssi_delta_6gb0=3,18,10,11,3,18,10,11,3,18,10,11,3,18,10,11,5,20,12,14,5,20,12,14,5,20,12,14,5,20,12,14
|
||||
rssi_delta_6gb1=2,18,11,11,2,18,11,11,2,18,11,11,2,18,11,11,2,19,11,12,2,19,11,12,2,19,11,12,2,19,11,12
|
||||
rssi_delta_6gb2=4,19,13,14,4,19,13,14,4,19,13,14,4,19,13,14,4,20,14,15,4,20,14,15,4,20,14,15,4,20,14,15
|
||||
rssi_delta_6gb3=4,19,13,14,4,19,13,14,4,19,13,14,4,19,13,14,4,20,13,14,4,20,13,14,4,20,13,14,4,20,13,14
|
||||
rssi_delta_6gb4=7,22,16,17,7,22,16,17,7,22,16,17,7,22,16,17,8,23,18,18,8,23,18,18,8,23,18,18,8,23,18,18
|
||||
rssi_delta_6gb5=9,24,18,18,9,24,18,18,9,24,18,18,9,24,18,18,10,24,20,19,10,24,20,19,10,24,20,19,10,24,20,19
|
||||
#RSSI compensation parameters for 2G FBC and 5G/6G scan core in qdBm
|
||||
rssi_delta_2gb0_fbc=7,2,4,2,7,2,4,2,9,2,4,3,9,2,4,3
|
||||
rssi_delta_2gb1_fbc=3,-1,2,0,3,-1,2,0,5,0,3,1,5,0,3,1
|
||||
rssi_delta_2gb2_fbc=2,0,3,0,2,0,3,0,1,0,1,-1,1,0,1,-1
|
||||
rssi_delta_2gb3_fbc=8,4,10,8,8,4,10,8,10,5,10,8,10,5,10,8
|
||||
rssi_delta_2gb4_fbc=9,8,11,10,9,8,11,10,10,8,11,10,10,8,11,10
|
||||
slice/2/rssicorrnorm5g_c0=-2,-2,-2,-2,0,0,0,0,5,5,5,5,3,3,3,3
|
||||
slice/2/rssicorrnorm6g_c0=8,8,8,8,10,10,10,10,8,8,8,8,12,12,12,12,9,9,9,9,15,15,15,15
|
||||
gain_cal_temp=33
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
|
||||
tone_to_pkt_rssi_offset=-3,-3,-6,-6,-6,-6,-6,-6,-3,-3,-6,-6,-6,-6,-6,-6
|
||||
tone_to_pkt_rssi_offset_6g=-3,-3,-7,-7,-7,-7,-7,-7,-3,-3,-7,-7,-7,-7,-7,-7
|
||||
slice/1/tone_to_pkt_rssi_offset=-4,-4,-4,-4
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
# Base K values
|
||||
#20 to 80MHz on Main
|
||||
az_offset_perbw=0,0,0,0,0
|
||||
az_160mkval=15407,15917
|
||||
az_80mkval=14217,14649,14885,14318,13154,13535
|
||||
az_40mkval=19610,19461,17392,20588,20716,19774,18674,19149,17621,18768,19582,16919
|
||||
az_20mkval=48583,50281,48892,49189,50277,50000,49860,47692,50139,49082,50264,50009,48580,48317,48618,47915,45806,45744,48579,46951,48424,48544,46369,45135,48194
|
||||
# 6G K values for 11AZ
|
||||
az_offset_perbw_6g=0,0,0,0,0
|
||||
az_160mkval_6g=15380,16234,15563,15891,15314,15891,15179
|
||||
az_80mkval_6g=13828,13798,14216,14413,14812,14283,14779,13550,14111,14256,14462,14136,14503,14669
|
||||
az_40mkval_6g=17895,18625,18182,18846,18742,19260,19611,18909,19872,19873,13904,20030,18445,19512,16735,18802,19597,18515,18038,18303,19267,19184,17893,18651,19227,18488,16563,19802,19434
|
||||
az_low_20mkval_6g=47301,47387,48748,48231,47145,47446,48194,47933,47930,48661,48333,48444,49240,49059,48936,48769
|
||||
az_mid1_20mkval_6g=49372,49541,49390,49500,46002,47678,50289,50213,48581,49342,50306,50266,47605,47456,49468,49912
|
||||
az_mid2_20mkval_6g=50722,49109,49092,48488,46490,49408,49293,48605,49231,49307,48927,49044,48668,47700,48606,49497
|
||||
az_high_20mkval_6g=49646,49815,50225,46732,47165,49258,49996,50843,50881,50413,49247
|
||||
# Base K Values (For the VHT case 5G 160 & 5G80/40/20/2G20)
|
||||
proxd_basekival_5g_160=17205
|
||||
proxd_basektval_5g_160=17205
|
||||
proxd_basekival=14162,18262,39477,0
|
||||
proxd_basektval=14162,18262,39477,0
|
||||
# Offsets across channels (Upper nibble for target, lower nibble for initiator - saved in hex)
|
||||
proxd_160mkval=0x0101,0x0000
|
||||
proxd_80mkval=0x0202,0x0101,0x0000,0x0505,0x0101,0x0000
|
||||
proxd_40mkval=0x0202,0x0404,0x0202,0x0000,0x0202,0x0101,0x0404,0x0606,0x0505,0x0303,0x0101,0x0404
|
||||
proxd_20mkval=0x0909,0x0d0d,0x1010,0x0e0e,0x0e0e,0x0d0d,0x1010,0x0000,0x0b0b,0x0e0e,0x0a0a,0x0d0d,0x0e0e,0x1212,0x1212,0x0d0d,0x1010,0x0e0e,0x0d0d,0x0f0f,0x0c0c,0x0d0d,0x0c0c,0x1111,0x0e0e
|
||||
proxd_2gkval=0
|
||||
# Offsets across frame formats @ Initiator
|
||||
# Only for non-VHT frame (Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
# Delta between the base values are adjusted here
|
||||
proxdi_rate80m=0,0,0,0
|
||||
proxdi_rate40m=0,0,0,0
|
||||
proxdi_rate20m=0,0,0,0
|
||||
proxdi_rate2g=0,0,0,0
|
||||
proxdi_ack=0,0,0,0
|
||||
# Offsets across frame formats @ Responder
|
||||
proxdt_rate80m=0,0,0,0
|
||||
proxdt_rate40m=0,0,0,0
|
||||
proxdt_rate20m=0,0,0,0
|
||||
proxdt_rate2g=0,0,0,0
|
||||
proxdt_ack=0,0,0,0
|
||||
# Offsets for sub-bands (VHT, Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
proxd_sub80m40m=0,0,0,0,0
|
||||
proxd_sub80m20m=0,0,0,0,0
|
||||
proxd_sub40m20m=0,0,0,0,0
|
||||
proxd_sub80m40m_ch_off=154,-64,21828,24464,22971,22
|
||||
proxd_sub80m20m_ch_off=107,12172,6995,11679,5622,29
|
||||
proxd_sub40m20m_ch_off=157,50,1386,-6278,-2006,-1142,-235,-2842,-2292,-7,-63
|
||||
proxd_sub160m80m_ch_off=4229,8722
|
||||
proxd_sub160m40m_ch_off=19150,22307
|
||||
proxd_sub160m20m_ch_off=15885,10615
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=0
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_bandedge_2g_en=1
|
||||
slice/1/fdss_profile_2g=7,0,0,5,17,28,36,47,59,152,-90,-320,-140,0,140,320,90,128
|
||||
slice/1/fdss_profile_2g_ch13=8,0,0,5,17,24,28,36,47,59,151,-90,-320,-140,132,-136,140,320,90,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,88,120,136,168,228,147,-20,-64,-32,0,32,64,20,128,128
|
||||
slice/1/fdss_profile_11ax_2g_ch13=8,0,0,28,88,112,128,136,168,228,147,-20,-64,8,120,-392,32,64,20,128,128
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
slice/1/txshaper_en=1
|
||||
slice/1/txshaper_en_mfg=1
|
||||
slice/1/txs_rate_chan_profile=1
|
||||
slice/1/txshaper_en_11ax=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=0
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=0
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# olpc temp offset
|
||||
slice/1/olpc_tempslope2g=-78,-78
|
||||
olpc_tempslope5g=-78,-78
|
||||
olpc_tempslope6g=-78,-78
|
||||
|
||||
hwolpc_offset_c0=0x04,0x02FEFEFE,0x02FEFEFE,0x01FDFDFD,0x02FEFEFE
|
||||
hwolpc_offset_c1=0x04,0x03FFFFFF,0x03FFFFFF,0x04000000,0x03FFFFFF
|
||||
hwolpc_offset6g_c0=0x03FFFFFF,0x01FDFDFD,0x03FEFEFE,0x03FFFFFF,0x04000000,0x00FCFCFC
|
||||
hwolpc_offset6g_c1=0x01FDFDFD,0x00FCFCFC,0x02FDFDFD,0x04000000,0x03FFFFFF,0x00FCFCFC
|
||||
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=420,420,354,354
|
||||
AvVmid_c0=0,156,0,156,0,158,0,156,0,170
|
||||
AvVmid_c1=0,162,0,162,0,164,0,161,0,175
|
||||
AvVmid_6g_c0=0,180,0,180,0,180,0,180,0,180,0,180
|
||||
AvVmid_6g_c1=0,185,0,185,0,185,0,185,0,185,0,185
|
||||
slice/1/AvVmid_c0=0,170
|
||||
slice/1/AvVmid_c1=0,160
|
||||
|
||||
pacalver_nvram=0x1
|
||||
slice/1/pa2ga0=13,6964,-866
|
||||
slice/1/pa2ga1=15,6675,-903
|
||||
pa5ga0=45,7024,-1077,69,7085,-1095,46,6969,-1077,20,6646,-1044
|
||||
pa5ga1=3,6834,-1048,15,6877,-1064,-22,6687,-1061,-1,6673,-1044
|
||||
pa6ga0=47,6900,-1049,19,6827,-1078,34,6896,-1074,46,6944,-1081,14,6843,-1109,-8,6651,-1109
|
||||
pa6ga1=-22,6573,-1038,-1,6619,-1036,-33,6468,-1036,-12,6549,-1031,-0,6591,-1052,6,6610,-1058
|
||||
|
||||
# Max power and offsets
|
||||
maxp2ga0=74
|
||||
maxp2ga1=74
|
||||
maxp5ga0=76,76,76,76
|
||||
maxp5ga1=76,76,76,76
|
||||
maxp6ga0=76,76,76,76,76,76
|
||||
maxp6ga1=76,76,76,76,76,76
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
slice/1/tpc_shaper_offset_mcs3_below=-4
|
||||
slice/1/powoffs2gtna0=1,0,0,0,0,0,0,0,0,0,0,0,-1,0
|
||||
slice/1/powoffs2gtna1=1,0,0,0,0,0,0,0,0,0,-1,-1,-1,0
|
||||
slice/1/powoffsccktna0=-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-4,-4,-4,-4
|
||||
slice/1/powoffsccktna1=-2,-2,-2,-2,-2,-2,-2,-2,-2,-2,-4,-4,-4,-4
|
||||
|
||||
pdoffset40ma0=0x5555
|
||||
pdoffset40ma1=0x5555
|
||||
pdoffset80ma0=0x5555
|
||||
pdoffset80ma1=0x5555
|
||||
pdoffset160ma0=0x7777
|
||||
pdoffset160ma1=0x7777
|
||||
pdoffset6g40ma0=0x555555
|
||||
pdoffset6g40ma1=0x555555
|
||||
pdoffset6g80ma0=0x555555
|
||||
pdoffset6g80ma1=0x555555
|
||||
pdoffset6g160ma0=0x777777
|
||||
pdoffset6g160ma1=0x777777
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0
|
||||
mcsbw202gpo=0x97432100
|
||||
dot11agofdmhrbw202gpo=0x21200
|
||||
ofdmlrbw202gpo=0x0000
|
||||
mcsbw205glpo=0x98531000
|
||||
mcsbw405glpo=0xa8642111
|
||||
mcsbw805glpo=0xa8753222
|
||||
mcsbw1605glpo=0xa8753222
|
||||
mcsbw205gmpo=0x98531000
|
||||
mcsbw405gmpo=0xa8642111
|
||||
mcsbw805gmpo=0xa8753222
|
||||
mcsbw1605gmpo=0xa8753222
|
||||
mcsbw205ghpo=0x98531000
|
||||
mcsbw405ghpo=0xa8642111
|
||||
mcsbw805ghpo=0xa8753222
|
||||
mcsbw1605ghpo=0xa8753222
|
||||
mcs1024qam5glpo=0xEEEECCCC
|
||||
mcs1024qam5gmpo=0xEEEECCCC
|
||||
mcs1024qam5ghpo=0xEEEECCCC
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
mcs10poexp=0
|
||||
mcs11poexp=0
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0x98531000
|
||||
mcsbw406gb1po=0xa8642111
|
||||
mcsbw806gb1po=0xa8753222
|
||||
mcsbw1606gb1po=0xa8753222
|
||||
mcsbw206gb2po=0x98531000
|
||||
mcsbw406gb2po=0xa8642111
|
||||
mcsbw806gb2po=0xa8753222
|
||||
mcsbw1606gb2po=0xa8753222
|
||||
mcsbw206gb3po=0x98531000
|
||||
mcsbw406gb3po=0xa8642111
|
||||
mcsbw806gb3po=0xa8753222
|
||||
mcsbw1606gb3po=0xa8753222
|
||||
mcsbw206gb4po=0x98531000
|
||||
mcsbw406gb4po=0xa8642111
|
||||
mcsbw806gb4po=0xa8753222
|
||||
mcsbw1606gb4po=0xa8753222
|
||||
mcsbw206gb5po=0x98531000
|
||||
mcsbw406gb5po=0xa8642111
|
||||
mcsbw806gb5po=0xa8753222
|
||||
mcsbw1606gb5po=0xa8753222
|
||||
mcsbw206gb6po=0x98531000
|
||||
mcsbw406gb6po=0xa8642111
|
||||
mcsbw806gb6po=0xa8753222
|
||||
mcsbw1606gb6po=0xa8753222
|
||||
mcs1024qam6gb1po=0xEEEECCCC
|
||||
mcs1024qam6gb2po=0xEEEECCCC
|
||||
mcs1024qam6gb3po=0xEEEECCCC
|
||||
mcs1024qam6gb4po=0xEEEECCCC
|
||||
mcs1024qam6gb5po=0xEEEECCCC
|
||||
mcs1024qam6gb6po=0xEEEECCCC
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2g20 ##
|
||||
ruppr2g20bpsk=0x000EF7BD,0x00F7D000
|
||||
ruppr2g20qpsk=0x000FFFFF,0x00FFF000
|
||||
ruppr2g20qam16=0x00008421,0x00041000
|
||||
ruppr2g20qam64=0x00018C63,0x000C3000
|
||||
ruppr2g20qam256=0x000294A5,0x00145000
|
||||
ruppr2g20qam1024=0x00039CE7,0x001C7000
|
||||
ruppr2g20qam4096=0x00000000,0x00000000
|
||||
## ULOFDMA Board limit PPRs for 5g20 ##
|
||||
ruppr5g20bpsk=0x000F7BDE,0x00FBE000
|
||||
ruppr5g20qpsk=0x00000000,0x00000000
|
||||
ruppr5g20qam16=0x00010842,0x00082000
|
||||
ruppr5g20qam64=0x00021084,0x00104000
|
||||
ruppr5g20qam256=0x000318C6,0x00186000
|
||||
ruppr5g20qam1024=0x00042108,0x00208000
|
||||
ruppr5g20qam4096=0x0006318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 5g40 ##
|
||||
ruppr5g40bpsk=0x03EF7BDE,0x00FBE000
|
||||
ruppr5g40qpsk=0x00000000,0x00000000
|
||||
ruppr5g40qam16=0x00210842,0x00082000
|
||||
ruppr5g40qam64=0x00421084,0x00104000
|
||||
ruppr5g40qam256=0x006318C6,0x00186000
|
||||
ruppr5g40qam1024=0x00842108,0x00208000
|
||||
ruppr5g40qam4096=0x00C6318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 5g80 ##
|
||||
ruppr5g80bpsk=0xFBEF7BDE,0x3EFBE000
|
||||
ruppr5g80qpsk=0x00000000,0x00000000
|
||||
ruppr5g80qam16=0x08210842,0x02082000
|
||||
ruppr5g80qam64=0x10421084,0x04104000
|
||||
ruppr5g80qam256=0x186318C6,0x06186000
|
||||
ruppr5g80qam1024=0x20842108,0x08208000
|
||||
ruppr5g80qam4096=0x30C6318C,0x0C30C000
|
||||
## ULOFDMA Board limit PPRs for 5g160 ##
|
||||
ruppr5g160bpsk=0xFBEF7BDE,0x3EFBE03E,0x00000FBE
|
||||
ruppr5g160qpsk=0x00000000,0x00000000,0x00000000
|
||||
ruppr5g160qam16=0x08210842,0x02082002,0x00000082
|
||||
ruppr5g160qam64=0x10421084,0x04104004,0x00000104
|
||||
ruppr5g160qam256=0x186318C6,0x06186006,0x00000186
|
||||
ruppr5g160qam1024=0x20842108,0x08208008,0x00000208
|
||||
ruppr5g160qam4096=0x30C6318C,0x0C30C00C,0x0000030C
|
||||
## ULOFDMA Board limit PPRs for 6g20 ##
|
||||
ruppr6g20bpsk=0x000F7BDE,0x00FBE000
|
||||
ruppr6g20qpsk=0x00000000,0x00000000
|
||||
ruppr6g20qam16=0x00010842,0x00082000
|
||||
ruppr6g20qam64=0x00021084,0x00104000
|
||||
ruppr6g20qam256=0x000318C6,0x00186000
|
||||
ruppr6g20qam1024=0x00042108,0x00208000
|
||||
ruppr6g20qam4096=0x0006318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 6g40 ##
|
||||
ruppr6g40bpsk=0x03EF7BDE,0x00FBE000
|
||||
ruppr6g40qpsk=0x00000000,0x00000000
|
||||
ruppr6g40qam16=0x00210842,0x00082000
|
||||
ruppr6g40qam64=0x00421084,0x00104000
|
||||
ruppr6g40qam256=0x006318C6,0x00186000
|
||||
ruppr6g40qam1024=0x00842108,0x00208000
|
||||
ruppr6g40qam4096=0x00C6318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 6g80 ##
|
||||
ruppr6g80bpsk=0xFBEF7BDE,0x3EFBE000
|
||||
ruppr6g80qpsk=0x00000000,0x00000000
|
||||
ruppr6g80qam16=0x08210842,0x02082000
|
||||
ruppr6g80qam64=0x10421084,0x04104000
|
||||
ruppr6g80qam256=0x186318C6,0x06186000
|
||||
ruppr6g80qam1024=0x20842108,0x08208000
|
||||
ruppr6g80qam4096=0x30C6318C,0x0C30C000
|
||||
## ULOFDMA Board limit PPRs for 6g160 ##
|
||||
ruppr6g160bpsk=0xFBEF7BDE,0x3EFBE03E,0x00000FBE
|
||||
ruppr6g160qpsk=0x00000000,0x00000000,0x00000000
|
||||
ruppr6g160qam16=0x08210842,0x02082002,0x00000082
|
||||
ruppr6g160qam64=0x10421084,0x04104004,0x00000104
|
||||
ruppr6g160qam256=0x186318C6,0x06186006,0x00000186
|
||||
ruppr6g160qam1024=0x20842108,0x08208008,0x00000208
|
||||
ruppr6g160qam4096=0x30C6318C,0x0C30C00C,0x0000030C
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_2g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_2g=-128,20
|
||||
slice/1/mppc_gaindelta_pa1=44
|
||||
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,12
|
||||
mppc_gaindelta_pa1=0,30,32,32,32,28,27,29,28,29,28
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x93938181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008383, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x1
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# UWB Coex
|
||||
uwbcx_en=1
|
||||
uwbcx_gpio_input=0x4
|
||||
uwbcx_coex_bitmap_5g=0x03ff,0x07ff,0x7f
|
||||
uwbcx_coex_bitmap_6g=0xffff,0xffff,0xffff,0x07ff
|
||||
|
||||
# energy detect threshold
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-63,-63
|
||||
ed_thresh_sec5g=-63
|
||||
ed_thresh_sec6g=-63,-63
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-63
|
||||
eu_edthresh5g=-63
|
||||
eu_edthresh6g=-63,-63
|
||||
eu_edthresh_sec5g=-63
|
||||
eu_edthresh_sec6g=-63,-63
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossTx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
felossTx5ga0=0,0,0,0
|
||||
felossTx5ga1=0,0,0,0
|
||||
felossRx5ga0=0,0,0,0
|
||||
felossRx5ga1=0,0,0,0
|
||||
felossTx6ga0=0,0,0,0,0,0
|
||||
felossTx6ga1=0,0,0,0,0,0
|
||||
felossRx6ga0=0,0,0,0,0,0
|
||||
felossRx6ga1=0,0,0,0,0,0
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
##Dynamic SAR related Params
|
||||
dynsar_fcc_rev=4
|
||||
|
||||
###LPC EPABYPASS MODE
|
||||
lpc_epabypass_en=1
|
||||
lpc_epabypass_maxpwr=-10
|
||||
lpc_epagain=60
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
lesi_desoffset_20MHzextra=1,1,1
|
||||
|
||||
#scan5g elnabyp
|
||||
slice/2/scan_ebyp_ncc=1
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
|
||||
## List of duty cycle temperature thresholds in descending order (num = 3)
|
||||
tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/bphy_pre_det_en=0
|
||||
+686
@@ -0,0 +1,686 @@
|
||||
# nvram for bcm94390b1f10rfem board.
|
||||
# nvram copied and edited from bcm94390b0f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390b1f10rfem B0 10x10 P200 ref board B0 bFEM
|
||||
#SSID: 0x0af3
|
||||
#macmid: 0x0596
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Proprietary:>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
# All svn keyword entries must come before this comment. Any change within four
|
||||
# lines of an svn keyword line will cause patching errors in precommit.
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1202
|
||||
boardtype=0x0b01
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002100
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:12:d0:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=16
|
||||
rxgains2gtrisoa0=17
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=15
|
||||
rxgains5gtrisoa0=17
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=15
|
||||
rxgains5gmtrisoa0=17
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=15
|
||||
rxgains5ghtrisoa0=17
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=16
|
||||
rxgains2gtrisoa1=17
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=15
|
||||
rxgains5gtrisoa1=17
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=15
|
||||
rxgains5gmtrisoa1=17
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=15
|
||||
rxgains5ghtrisoa1=17
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=2
|
||||
rxgains2gfelossa1=2
|
||||
rxgains5gfelossa0=2
|
||||
rxgains5gfelossa1=2
|
||||
rxgains5gmfelossa0=1
|
||||
rxgains5gmfelossa1=1
|
||||
rxgains5ghfelossa0=1
|
||||
rxgains5ghfelossa1=1
|
||||
rxgains5gbkoffa0=9
|
||||
rxgains5gbkoffa1=9
|
||||
|
||||
rxgains6gelnagaina0=15
|
||||
rxgains6gtrisoa0=17
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=15
|
||||
rxgains6gmtrisoa0=17
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=15
|
||||
rxgains6ghtrisoa0=17
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=1
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=15
|
||||
rxgains6gtrisoa1=17
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=15
|
||||
rxgains6gmtrisoa1=17
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=15
|
||||
rxgains6ghtrisoa1=17
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=1
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related for dedicated mode in qdBm
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=6,5,7,5,6,5,7,5,7,5,7,5,7,5,7,5
|
||||
rssi_delta_2gb1=6,4,7,5,6,4,7,5,7,4,8,6,7,4,8,6
|
||||
rssi_delta_2gb2=6,5,7,6,6,5,7,6,5,5,5,3,5,5,5,3
|
||||
rssi_delta_2gb3=10,7,11,10,10,7,11,10,11,5,12,10,11,5,12,10
|
||||
rssi_delta_2gb4=8,7,10,9,8,7,10,9,9,7,10,8,9,7,10,8
|
||||
rssi_delta_5gl=-6,4,-4,-3,-6,4,-4,-3,-6,4,-4,-3,-6,4,-4,-3,-6,5,-3,-1,-6,5,-3,-1,-6,5,-3,-1,-6,5,-3,-1
|
||||
rssi_delta_5gml=-2,10,3,3,-2,10,3,3,-2,10,3,3,-2,10,3,3,-1,12,4,5,-1,12,4,5,-1,12,4,5,-1,12,4,5
|
||||
rssi_delta_5gmu=-1,12,4,5,-1,12,4,5,-1,12,4,5,-1,12,4,5,1,14,7,7,1,14,7,7,1,14,7,7,1,14,7,7
|
||||
rssi_delta_5gh=1,14,6,7,1,14,6,7,1,14,6,7,1,14,6,7,2,17,9,10,2,17,9,10,2,17,9,10,2,17,9,10
|
||||
rssi_delta_6gb0=3,18,10,11,3,18,10,11,3,18,10,11,3,18,10,11,5,20,12,14,5,20,12,14,5,20,12,14,5,20,12,14
|
||||
rssi_delta_6gb1=2,18,11,11,2,18,11,11,2,18,11,11,2,18,11,11,2,19,11,12,2,19,11,12,2,19,11,12,2,19,11,12
|
||||
rssi_delta_6gb2=4,19,13,14,4,19,13,14,4,19,13,14,4,19,13,14,4,20,14,15,4,20,14,15,4,20,14,15,4,20,14,15
|
||||
rssi_delta_6gb3=4,19,13,14,4,19,13,14,4,19,13,14,4,19,13,14,4,20,13,14,4,20,13,14,4,20,13,14,4,20,13,14
|
||||
rssi_delta_6gb4=7,22,16,17,7,22,16,17,7,22,16,17,7,22,16,17,8,23,18,18,8,23,18,18,8,23,18,18,8,23,18,18
|
||||
rssi_delta_6gb5=9,24,18,18,9,24,18,18,9,24,18,18,9,24,18,18,10,24,20,19,10,24,20,19,10,24,20,19,10,24,20,19
|
||||
#RSSI compensation parameters for 2G FBC and 5G/6G scan core in qdBm
|
||||
rssi_delta_2gb0_fbc=7,2,4,2,7,2,4,2,9,2,4,3,9,2,4,3
|
||||
rssi_delta_2gb1_fbc=3,-1,2,0,3,-1,2,0,5,0,3,1,5,0,3,1
|
||||
rssi_delta_2gb2_fbc=2,0,3,0,2,0,3,0,1,0,1,-1,1,0,1,-1
|
||||
rssi_delta_2gb3_fbc=8,4,10,8,8,4,10,8,10,5,10,8,10,5,10,8
|
||||
rssi_delta_2gb4_fbc=9,8,11,10,9,8,11,10,10,8,11,10,10,8,11,10
|
||||
slice/2/rssicorrnorm5g_c0=-2,-2,-2,-2,-2,-2,-2,-2,1,1,1,1,3,3,3,3
|
||||
slice/2/rssicorrnorm6g_c0=6,6,6,6,8,8,8,8,8,8,8,8,8,8,8,8,9,9,9,9,11,11,11,11
|
||||
gain_cal_temp=33
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
|
||||
tone_to_pkt_rssi_offset=-3,-3,-6,-6,-6,-6,-6,-6,-3,-3,-6,-6,-6,-6,-6,-6
|
||||
tone_to_pkt_rssi_offset_6g=-3,-3,-7,-7,-7,-7,-7,-7,-3,-3,-7,-7,-7,-7,-7,-7
|
||||
slice/1/tone_to_pkt_rssi_offset=-4,-4,-4,-4
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
# Base K values
|
||||
#20 to 80MHz on Main
|
||||
az_offset_perbw=0,0,0,0,0
|
||||
az_160mkval=15407,15917
|
||||
az_80mkval=14217,14649,14885,14318,13154,13535
|
||||
az_40mkval=19610,19461,17392,20588,20716,19774,18674,19149,17621,18768,19582,16919
|
||||
az_20mkval=48583,50281,48892,49189,50277,50000,49860,47692,50139,49082,50264,50009,48580,48317,48618,47915,45806,45744,48579,46951,48424,48544,46369,45135,48194
|
||||
# 6G K values for 11AZ
|
||||
az_offset_perbw_6g=0,0,0,0,0
|
||||
az_160mkval_6g=15380,16234,15563,15891,15314,15891,15179
|
||||
az_80mkval_6g=13828,13798,14216,14413,14812,14283,14779,13550,14111,14256,14462,14136,14503,14669
|
||||
az_40mkval_6g=17895,18625,18182,18846,18742,19260,19611,18909,19872,19873,13904,20030,18445,19512,16735,18802,19597,18515,18038,18303,19267,19184,17893,18651,19227,18488,16563,19802,19434
|
||||
az_low_20mkval_6g=47301,47387,48748,48231,47145,47446,48194,47933,47930,48661,48333,48444,49240,49059,48936,48769
|
||||
az_mid1_20mkval_6g=49372,49541,49390,49500,46002,47678,50289,50213,48581,49342,50306,50266,47605,47456,49468,49912
|
||||
az_mid2_20mkval_6g=50722,49109,49092,48488,46490,49408,49293,48605,49231,49307,48927,49044,48668,47700,48606,49497
|
||||
az_high_20mkval_6g=49646,49815,50225,46732,47165,49258,49996,50843,50881,50413,49247
|
||||
# Base K Values (For the VHT case 5G 160 & 5G80/40/20/2G20)
|
||||
proxd_basekival_5g_160=17205
|
||||
proxd_basektval_5g_160=17205
|
||||
proxd_basekival=14162,18262,39477,0
|
||||
proxd_basektval=14162,18262,39477,0
|
||||
# Offsets across channels (Upper nibble for target, lower nibble for initiator - saved in hex)
|
||||
proxd_160mkval=0x0101,0x0000
|
||||
proxd_80mkval=0x0202,0x0101,0x0000,0x0505,0x0101,0x0000
|
||||
proxd_40mkval=0x0202,0x0404,0x0202,0x0000,0x0202,0x0101,0x0404,0x0606,0x0505,0x0303,0x0101,0x0404
|
||||
proxd_20mkval=0x0909,0x0d0d,0x1010,0x0e0e,0x0e0e,0x0d0d,0x1010,0x0000,0x0b0b,0x0e0e,0x0a0a,0x0d0d,0x0e0e,0x1212,0x1212,0x0d0d,0x1010,0x0e0e,0x0d0d,0x0f0f,0x0c0c,0x0d0d,0x0c0c,0x1111,0x0e0e
|
||||
proxd_2gkval=0
|
||||
# Offsets across frame formats @ Initiator
|
||||
# Only for non-VHT frame (Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
# Delta between the base values are adjusted here
|
||||
proxdi_rate80m=0,0,0,0
|
||||
proxdi_rate40m=0,0,0,0
|
||||
proxdi_rate20m=0,0,0,0
|
||||
proxdi_rate2g=0,0,0,0
|
||||
proxdi_ack=0,0,0,0
|
||||
# Offsets across frame formats @ Responder
|
||||
proxdt_rate80m=0,0,0,0
|
||||
proxdt_rate40m=0,0,0,0
|
||||
proxdt_rate20m=0,0,0,0
|
||||
proxdt_rate2g=0,0,0,0
|
||||
proxdt_ack=0,0,0,0
|
||||
# Offsets for sub-bands (VHT, Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
proxd_sub80m40m=0,0,0,0,0
|
||||
proxd_sub80m20m=0,0,0,0,0
|
||||
proxd_sub40m20m=0,0,0,0,0
|
||||
proxd_sub80m40m_ch_off=154,-64,21828,24464,22971,22
|
||||
proxd_sub80m20m_ch_off=107,12172,6995,11679,5622,29
|
||||
proxd_sub40m20m_ch_off=157,50,1386,-6278,-2006,-1142,-235,-2842,-2292,-7,-63
|
||||
proxd_sub160m80m_ch_off=4229,8722
|
||||
proxd_sub160m40m_ch_off=19150,22307
|
||||
proxd_sub160m20m_ch_off=15885,10615
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=0
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_bandedge_2g_en=1
|
||||
slice/1/fdss_profile_2g=7,0,0,5,17,28,36,47,59,152,-90,-320,-140,0,140,320,90,128
|
||||
slice/1/fdss_profile_2g_ch13=8,0,0,5,17,24,28,36,47,59,151,-90,-320,-140,132,-136,140,320,90,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,88,120,136,168,228,147,-20,-64,-32,0,32,64,20,128,128
|
||||
slice/1/fdss_profile_11ax_2g_ch13=8,0,0,28,88,112,128,136,168,228,147,-20,-64,8,120,-392,32,64,20,128,128
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
slice/1/txshaper_en=1
|
||||
slice/1/txshaper_en_mfg=1
|
||||
slice/1/txs_rate_chan_profile=1
|
||||
slice/1/txshaper_en_11ax=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=0
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=0
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# olpc temp offset
|
||||
slice/1/olpc_tempslope2g=-78,-78
|
||||
olpc_tempslope5g=-78,-78
|
||||
olpc_tempslope6g=-78,-78
|
||||
|
||||
hwolpc_offset_c0=0x04,0x02FEFEFE,0x02FEFEFE,0x01FDFDFD,0x02FEFEFE
|
||||
hwolpc_offset_c1=0x04,0x03FFFFFF,0x03FFFFFF,0x04000000,0x03FFFFFF
|
||||
hwolpc_offset6g_c0=0x03FFFFFF,0x01FDFDFD,0x03FEFEFE,0x03FFFFFF,0x04000000,0x00FCFCFC
|
||||
hwolpc_offset6g_c1=0x01FDFDFD,0x00FCFCFC,0x02FDFDFD,0x04000000,0x03FFFFFF,0x00FCFCFC
|
||||
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=420,420,354,354
|
||||
AvVmid_c0=0,156,0,156,0,158,0,156,0,170
|
||||
AvVmid_c1=0,162,0,162,0,164,0,161,0,175
|
||||
AvVmid_6g_c0=0,180,0,180,0,180,0,180,0,180,0,180
|
||||
AvVmid_6g_c1=0,185,0,185,0,185,0,185,0,185,0,185
|
||||
slice/1/AvVmid_c0=0,170
|
||||
slice/1/AvVmid_c1=0,160
|
||||
|
||||
pacalver_nvram=0x1
|
||||
slice/1/pa2ga0=13,6964,-866
|
||||
slice/1/pa2ga1=15,6675,-903
|
||||
pa5ga0=45,7024,-1077,69,7085,-1095,46,6969,-1077,20,6646,-1044
|
||||
pa5ga1=3,6834,-1048,15,6877,-1064,-22,6687,-1061,-1,6673,-1044
|
||||
pa6ga0=47,6900,-1049,19,6827,-1078,34,6896,-1074,46,6944,-1081,14,6843,-1109,-8,6651,-1109
|
||||
pa6ga1=-22,6573,-1038,-1,6619,-1036,-33,6468,-1036,-12,6549,-1031,-0,6591,-1052,6,6610,-1058
|
||||
|
||||
# Max power and offsets
|
||||
maxp2ga0=74
|
||||
maxp2ga1=74
|
||||
maxp5ga0=76,76,76,76
|
||||
maxp5ga1=76,76,76,76
|
||||
maxp6ga0=76,76,76,76,76,76
|
||||
maxp6ga1=76,76,76,76,76,76
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
slice/1/tpc_shaper_offset_mcs3_below=-4
|
||||
slice/1/powoffs2gtna0=2,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=2,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffsetcckma0=0x02
|
||||
slice/1/pdoffsetcckma1=0x02
|
||||
|
||||
pdoffset40ma0=0x5555
|
||||
pdoffset40ma1=0x5555
|
||||
pdoffset80ma0=0x5555
|
||||
pdoffset80ma1=0x5555
|
||||
pdoffset160ma0=0x7777
|
||||
pdoffset160ma1=0x7777
|
||||
pdoffset6g40ma0=0x555555
|
||||
pdoffset6g40ma1=0x555555
|
||||
pdoffset6g80ma0=0x555555
|
||||
pdoffset6g80ma1=0x555555
|
||||
pdoffset6g160ma0=0x777777
|
||||
pdoffset6g160ma1=0x777777
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0x00
|
||||
mcsbw202gpo=0x65200000
|
||||
dot11agofdmhrbw202gpo=0x00000
|
||||
ofdmlrbw202gpo=0x0000
|
||||
mcs1024qam2gpo=0x88
|
||||
|
||||
mcsbw205glpo=0x54210000
|
||||
mcsbw205gmpo=0x54210000
|
||||
mcsbw205ghpo=0x32100000
|
||||
mcsbw405glpo=0x54210000
|
||||
mcsbw405gmpo=0x54210000
|
||||
mcsbw405ghpo=0x32000000
|
||||
mcsbw805glpo=0x54210000
|
||||
mcsbw805gmpo=0x54210000
|
||||
mcsbw805ghpo=0x32000000
|
||||
mcsbw1605glpo=0x65310000
|
||||
mcsbw1605gmpo=0x65320000
|
||||
mcsbw1605ghpo=0x43100000
|
||||
mcs1024qam5glpo=0x88667777
|
||||
mcs1024qam5gmpo=0x88666666
|
||||
mcs1024qam5ghpo=0x66444455
|
||||
mcs4096qam5glpo=0xAA888888
|
||||
mcs4096qam5gmpo=0xAA888888
|
||||
mcs4096qam5ghpo=0x77666666
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0x65320000
|
||||
mcsbw206gb2po=0x65320000
|
||||
mcsbw206gb3po=0x64320000
|
||||
mcsbw206gb4po=0x65320000
|
||||
mcsbw206gb5po=0x65420000
|
||||
mcsbw206gb6po=0x65431000
|
||||
mcsbw406gb1po=0x75320000
|
||||
mcsbw406gb2po=0x54210000
|
||||
mcsbw406gb3po=0x65320000
|
||||
mcsbw406gb4po=0x65320000
|
||||
mcsbw406gb5po=0x64320000
|
||||
mcsbw406gb6po=0x65431000
|
||||
mcsbw806gb1po=0x54210000
|
||||
mcsbw806gb2po=0x54210000
|
||||
mcsbw806gb3po=0x54210000
|
||||
mcsbw806gb4po=0x54210000
|
||||
mcsbw806gb5po=0x64320000
|
||||
mcsbw806gb6po=0x65320000
|
||||
mcsbw1606gb1po=0x54310000
|
||||
mcsbw1606gb2po=0x65320000
|
||||
mcsbw1606gb3po=0x65430000
|
||||
mcsbw1606gb4po=0x65320000
|
||||
mcsbw1606gb5po=0x76431000
|
||||
mcsbw1606gb6po=0x65431000
|
||||
mcs1024qam6gb1po=0x6666BBAA
|
||||
mcs1024qam6gb2po=0x77666677
|
||||
mcs1024qam6gb3po=0x88667777
|
||||
mcs1024qam6gb4po=0x77667777
|
||||
mcs1024qam6gb5po=0x99777788
|
||||
mcs1024qam6gb6po=0x88778877
|
||||
mcs4096qam6gb1po=0xCCFFFFFF
|
||||
mcs4096qam6gb2po=0xAA888888
|
||||
mcs4096qam6gb3po=0xAA999999
|
||||
mcs4096qam6gb4po=0xAA889988
|
||||
mcs4096qam6gb5po=0xAA99CCAA
|
||||
mcs4096qam6gb6po=0xBB999999
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2g20 ##
|
||||
ruppr2g20bpsk=0x000EF7BD,0x00F7D000
|
||||
ruppr2g20qpsk=0x000FFFFF,0x00FFF000
|
||||
ruppr2g20qam16=0x00008421,0x00041000
|
||||
ruppr2g20qam64=0x00018C63,0x000C3000
|
||||
ruppr2g20qam256=0x000294A5,0x00145000
|
||||
ruppr2g20qam1024=0x00039CE7,0x001C7000
|
||||
ruppr2g20qam4096=0x00000000,0x00000000
|
||||
## ULOFDMA Board limit PPRs for 5g20 ##
|
||||
ruppr5g20bpsk=0x000F7BDE,0x00FBE000
|
||||
ruppr5g20qpsk=0x00000000,0x00000000
|
||||
ruppr5g20qam16=0x00010842,0x00082000
|
||||
ruppr5g20qam64=0x00021084,0x00104000
|
||||
ruppr5g20qam256=0x000318C6,0x00186000
|
||||
ruppr5g20qam1024=0x00042108,0x00208000
|
||||
ruppr5g20qam4096=0x0006318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 5g40 ##
|
||||
ruppr5g40bpsk=0x03EF7BDE,0x00FBE000
|
||||
ruppr5g40qpsk=0x00000000,0x00000000
|
||||
ruppr5g40qam16=0x00210842,0x00082000
|
||||
ruppr5g40qam64=0x00421084,0x00104000
|
||||
ruppr5g40qam256=0x006318C6,0x00186000
|
||||
ruppr5g40qam1024=0x00842108,0x00208000
|
||||
ruppr5g40qam4096=0x00C6318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 5g80 ##
|
||||
ruppr5g80bpsk=0xFBEF7BDE,0x3EFBE000
|
||||
ruppr5g80qpsk=0x00000000,0x00000000
|
||||
ruppr5g80qam16=0x08210842,0x02082000
|
||||
ruppr5g80qam64=0x10421084,0x04104000
|
||||
ruppr5g80qam256=0x186318C6,0x06186000
|
||||
ruppr5g80qam1024=0x20842108,0x08208000
|
||||
ruppr5g80qam4096=0x30C6318C,0x0C30C000
|
||||
## ULOFDMA Board limit PPRs for 5g160 ##
|
||||
ruppr5g160bpsk=0xFBEF7BDE,0x3EFBE03E,0x00000FBE
|
||||
ruppr5g160qpsk=0x00000000,0x00000000,0x00000000
|
||||
ruppr5g160qam16=0x08210842,0x02082002,0x00000082
|
||||
ruppr5g160qam64=0x10421084,0x04104004,0x00000104
|
||||
ruppr5g160qam256=0x186318C6,0x06186006,0x00000186
|
||||
ruppr5g160qam1024=0x20842108,0x08208008,0x00000208
|
||||
ruppr5g160qam4096=0x30C6318C,0x0C30C00C,0x0000030C
|
||||
## ULOFDMA Board limit PPRs for 6g20 ##
|
||||
ruppr6g20bpsk=0x000F7BDE,0x00FBE000
|
||||
ruppr6g20qpsk=0x00000000,0x00000000
|
||||
ruppr6g20qam16=0x00010842,0x00082000
|
||||
ruppr6g20qam64=0x00021084,0x00104000
|
||||
ruppr6g20qam256=0x000318C6,0x00186000
|
||||
ruppr6g20qam1024=0x00042108,0x00208000
|
||||
ruppr6g20qam4096=0x0006318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 6g40 ##
|
||||
ruppr6g40bpsk=0x03EF7BDE,0x00FBE000
|
||||
ruppr6g40qpsk=0x00000000,0x00000000
|
||||
ruppr6g40qam16=0x00210842,0x00082000
|
||||
ruppr6g40qam64=0x00421084,0x00104000
|
||||
ruppr6g40qam256=0x006318C6,0x00186000
|
||||
ruppr6g40qam1024=0x00842108,0x00208000
|
||||
ruppr6g40qam4096=0x00C6318C,0x0030C000
|
||||
## ULOFDMA Board limit PPRs for 6g80 ##
|
||||
ruppr6g80bpsk=0xFBEF7BDE,0x3EFBE000
|
||||
ruppr6g80qpsk=0x00000000,0x00000000
|
||||
ruppr6g80qam16=0x08210842,0x02082000
|
||||
ruppr6g80qam64=0x10421084,0x04104000
|
||||
ruppr6g80qam256=0x186318C6,0x06186000
|
||||
ruppr6g80qam1024=0x20842108,0x08208000
|
||||
ruppr6g80qam4096=0x30C6318C,0x0C30C000
|
||||
## ULOFDMA Board limit PPRs for 6g160 ##
|
||||
ruppr6g160bpsk=0xFBEF7BDE,0x3EFBE03E,0x00000FBE
|
||||
ruppr6g160qpsk=0x00000000,0x00000000,0x00000000
|
||||
ruppr6g160qam16=0x08210842,0x02082002,0x00000082
|
||||
ruppr6g160qam64=0x10421084,0x04104004,0x00000104
|
||||
ruppr6g160qam256=0x186318C6,0x06186006,0x00000186
|
||||
ruppr6g160qam1024=0x20842108,0x08208008,0x00000208
|
||||
ruppr6g160qam4096=0x30C6318C,0x0C30C00C,0x0000030C
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_2g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_2g=-128,20
|
||||
slice/1/mppc_gaindelta_pa1=44
|
||||
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,12
|
||||
mppc_gaindelta_pa1=0,30,32,32,32,28,27,29,28,29,28
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x93938181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008383, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x1
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# UWB Coex
|
||||
uwbcx_en=1
|
||||
uwbcx_gpio_input=0x4
|
||||
uwbcx_coex_bitmap_5g=0x03ff,0x07ff,0x7f
|
||||
uwbcx_coex_bitmap_6g=0xffff,0xffff,0xffff,0x07ff
|
||||
|
||||
# energy detect threshold
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-63,-63
|
||||
ed_thresh_sec5g=-63
|
||||
ed_thresh_sec6g=-63,-63
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-63
|
||||
eu_edthresh5g=-63
|
||||
eu_edthresh6g=-63,-63
|
||||
eu_edthresh_sec5g=-63
|
||||
eu_edthresh_sec6g=-63,-63
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossTx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
felossTx5ga0=0,0,0,0
|
||||
felossTx5ga1=0,0,0,0
|
||||
felossRx5ga0=0,0,0,0
|
||||
felossRx5ga1=0,0,0,0
|
||||
felossTx6ga0=0,0,0,0,0,0
|
||||
felossTx6ga1=0,0,0,0,0,0
|
||||
felossRx6ga0=0,0,0,0,0,0
|
||||
felossRx6ga1=0,0,0,0,0,0
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
##Dynamic SAR related Params
|
||||
dynsar_fcc_rev=4
|
||||
|
||||
###LPC EPABYPASS MODE
|
||||
lpc_epabypass_en=1
|
||||
lpc_epabypass_maxpwr=-10
|
||||
lpc_epagain=60
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
lesi_desoffset_20MHzextra=1,1,1
|
||||
|
||||
#scan5g elnabyp
|
||||
slice/2/scan_ebyp_ncc=1
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
|
||||
## List of duty cycle temperature thresholds in descending order (num = 3)
|
||||
tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/bphy_pre_det_en=0
|
||||
@@ -0,0 +1,650 @@
|
||||
# nvram for USI G6 SKU3 module V1.3 2023.07.14
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390a0GGmodUSIG6BB
|
||||
#SSID: 0x0aca
|
||||
#macmid: 0x055f
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Vendor1007>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1103
|
||||
boardtype=0x0aca
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002900
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:55:f0:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=17
|
||||
rxgains2gtrisoa0=19
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=16
|
||||
rxgains5gtrisoa0=19
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=16
|
||||
rxgains5gmtrisoa0=19
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=16
|
||||
rxgains5ghtrisoa0=19
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=17
|
||||
rxgains2gtrisoa1=19
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=16
|
||||
rxgains5gtrisoa1=19
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=16
|
||||
rxgains5gmtrisoa1=19
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=16
|
||||
rxgains5ghtrisoa1=19
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=1
|
||||
rxgains2gfelossa1=1
|
||||
rxgains5gfelossa0=0
|
||||
rxgains5gfelossa1=0
|
||||
rxgains5gmfelossa0=0
|
||||
rxgains5gmfelossa1=0
|
||||
rxgains5ghfelossa0=0
|
||||
rxgains5ghfelossa1=0
|
||||
|
||||
rxgains6gelnagaina0=16
|
||||
rxgains6gtrisoa0=19
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=16
|
||||
rxgains6gmtrisoa0=19
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=16
|
||||
rxgains6ghtrisoa0=19
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=2
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=16
|
||||
rxgains6gtrisoa1=19
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=16
|
||||
rxgains6gmtrisoa1=19
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=16
|
||||
rxgains6ghtrisoa1=19
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=2
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related
|
||||
rssi_cal_freq_grp_2g= 0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_delta_5gl=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gml=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gmu=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_5gh=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_5gl=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_5gml=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_5gmu=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_5gh=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_2gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_2gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_2gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_2gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_2gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
gain_cal_temp=36
|
||||
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
#Need update in code, below values in qdb
|
||||
slice/2/rssicorrnorm5g_c0=0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm5g_c1=0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm_c0=0,0
|
||||
slice/2/rssicorrnorm_c1=0,0
|
||||
|
||||
rssi_delta_6gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_6gb5=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssi_delta_6gb5=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
#cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=4
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_2g=-1,-1
|
||||
fdss_level_5g=-1,-1
|
||||
slice/1/fdss_level_2g=-1,-1
|
||||
slice/1/fdss_level_5g=-1,-1
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=0
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=0
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=420,420,354,354
|
||||
AvVmid_c0=0,169,0,169,0,169,0,171,0,181
|
||||
AvVmid_c1=0,161,0,161,0,161,0,162,0,174
|
||||
AvVmid_6g_c0=0,183,0,186,0,184,0,186,0,186,0,188
|
||||
AvVmid_6g_c1=0,173,0,176,0,176,0,177,0,181,0,182
|
||||
slice/1/AvVmid_c0=0,154
|
||||
slice/1/AvVmid_c1=0,146
|
||||
|
||||
pacalver_nvram=0x1
|
||||
# Calibration Window (2G:5 ~ 25dBm, 5G/6G : 8 ~ 25dBm)
|
||||
slice/1/pa2ga0=0x001f,0x1dc2,0xfb86
|
||||
slice/1/pa2ga1=0x0009,0x1b99,0xfbf6
|
||||
#pa5ga0=0x0011,0x1dde,0xfb57,0x0027,0x1daa,0xfb7e,0x0006,0x1d15,0xfb5f,0x002b,0x1ea0,0xfb79
|
||||
#pa5ga1=0x0052,0x1b6a,0xfbdd,0x005d,0x1b24,0xfbfb,0x004e,0x1b4c,0xfbe7,0x006b,0x1cc2,0xfc00
|
||||
#pa6ga0=0x003b,0x1e77,0xfb80,0x0023,0x1e29,0xfb86,0x001c,0x1dff,0xfb73,0x0047,0x1ef2,0xfb8d,0x003d,0x1e46,0xfb95,0x003d,0x1e24,0xfb91
|
||||
#pa6ga1=0x0067,0x1afa,0xfbf5,0x0060,0x1a3e,0xfbf5,0x007a,0x1a41,0xfbfb,0x009c,0x1af9,0xfc0b,0x0096,0x1af8,0xfc09,0x00a2,0x1b01,0xfc0e
|
||||
|
||||
# Calibration Window (7/19-USI-SOCKET 5PCS 5G/6G : 8 ~ 25dBm)
|
||||
pa5ga0=0x0024,0x1c0c,0xfbe5,0x002f,0x1be9,0xfbf7,0x001b,0x1b55,0xfbeb,0x0029,0x1cad,0xfbe0
|
||||
pa5ga1=0x002a,0x1c81,0xfbba,0x002a,0x1c2f,0xfbcb,0x0021,0x1bf0,0xfbdd,0x003c,0x1dfc,0xfbc6
|
||||
pa6ga0=0x0033,0x1c3a,0xfbfe,0x002e,0x1c6f,0xfbf8,0x0035,0x1c42,0xfbf4,0x003b,0x1cac,0xfbf2,0x0024,0x1bec,0xfbf4,0x002a,0x1beb,0xfbec
|
||||
pa6ga1=0x002c,0x1c3c,0xfbc7,0x0016,0x1b02,0xfbcb,0x0034,0x1b0c,0xfbd3,0x0062,0x1c35,0xfbd2,0xffe5,0x19c6,0xfbec,0x0043,0x1bc6,0xfbcb
|
||||
|
||||
# Max power and offsets
|
||||
slice/1/powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
#slice/1/pdoffsetcckma0=1
|
||||
#slice/1/pdoffsetcckma1=1
|
||||
|
||||
maxp2ga0=95
|
||||
maxp2ga1=96
|
||||
maxp5ga0=87,81,89,82
|
||||
maxp5ga1=90,80,91,83
|
||||
maxp6ga0=87,87,87,87,82,84
|
||||
maxp6ga1=87,87,84,84,80,82
|
||||
subband5gver=0x4
|
||||
paparambwver=3
|
||||
|
||||
slice/1/cckpwroffset0=0x6
|
||||
slice/1/cckpwroffset1=0x8
|
||||
pdoffset40ma0=0x5555
|
||||
pdoffset40ma1=0x5555
|
||||
pdoffset80ma0=0x5555
|
||||
pdoffset80ma1=0x5555
|
||||
pdoffset160ma0=0x7777
|
||||
pdoffset160ma1=0x7777
|
||||
pdoffset6g40ma0=0x335555
|
||||
pdoffset6g40ma1=0x335555
|
||||
pdoffset6g80ma0=0x113355
|
||||
pdoffset6g80ma1=0x113355
|
||||
pdoffset6g160ma0=0x777777
|
||||
pdoffset6g160ma1=0x777777
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0x1111
|
||||
mcsbw202gpo=0xEB975543
|
||||
dot11agofdmhrbw202gpo=0x7444
|
||||
ofdmlrbw202gpo=0x3133
|
||||
mcs1024qam2gpo=0x66
|
||||
mcsbw205glpo=0xA9753100
|
||||
mcsbw405glpo=0xA9865444
|
||||
mcsbw805glpo=0xA9865555
|
||||
mcsbw1605glpo=0xBA987777
|
||||
mcsbw205gmpo=0xA9753100
|
||||
mcsbw405gmpo=0xA9864333
|
||||
mcsbw805gmpo=0xA9864444
|
||||
mcsbw1605gmpo=0xA9887766
|
||||
mcsbw205ghpo=0xA9753100
|
||||
mcsbw405ghpo=0xA9865444
|
||||
mcsbw805ghpo=0xA9865555
|
||||
mcsbw1605ghpo=0xBA987777
|
||||
mcs1024qam5glpo=0xDDDDDDDD
|
||||
mcs1024qam5gmpo=0xDDCCCCCC
|
||||
mcs1024qam5ghpo=0xFFDDDDDD
|
||||
mcs4096qam5glpo=0x33111111
|
||||
mcs4096qam5gmpo=0x55331111
|
||||
mcs4096qam5ghpo=0x66555544
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
mcs10poexp=0x00000001
|
||||
mcs11poexp=0x00000001
|
||||
mcs12poexp=0xffffffff
|
||||
mcs13poexp=0xffffffff
|
||||
|
||||
mcs10poexp6g=0x00000000
|
||||
mcs11poexp6g=0x00000000
|
||||
mcs12poexp6g=0xffffffff
|
||||
mcs13poexp6g=0xffffffff
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0x86431000
|
||||
mcsbw406gb1po=0x87542222
|
||||
mcsbw806gb1po=0x98633333
|
||||
mcsbw1606gb1po=0xA9744444
|
||||
mcsbw3206gb1po=0xA9744444
|
||||
mcsbw206gb2po=0x86431000
|
||||
mcsbw406gb2po=0x87542222
|
||||
mcsbw806gb2po=0x98633333
|
||||
mcsbw1606gb2po=0xA9744444
|
||||
mcsbw3206gb2po=0xA9744444
|
||||
mcsbw206gb3po=0xA8643222
|
||||
mcsbw406gb3po=0xA9543444
|
||||
mcsbw806gb3po=0xBA654555
|
||||
mcsbw1606gb3po=0xCB876666
|
||||
mcsbw3206gb3po=0xCB876666
|
||||
mcsbw206gb4po=0xA8643222
|
||||
mcsbw406gb4po=0xA9543444
|
||||
mcsbw806gb4po=0xBA654555
|
||||
mcsbw1606gb4po=0xCB876666
|
||||
mcsbw3206gb4po=0xCB876666
|
||||
mcsbw206gb5po=0xB9743222
|
||||
mcsbw406gb5po=0xBA855444
|
||||
mcsbw806gb5po=0xBA876544
|
||||
mcsbw1606gb5po=0xBA876544
|
||||
mcsbw3206gb5po=0xBA876544
|
||||
mcsbw206gb6po=0xB9743222
|
||||
mcsbw406gb6po=0xBA855444
|
||||
mcsbw806gb6po=0xBA876544
|
||||
mcsbw1606gb6po=0xBA876544
|
||||
mcsbw3206gb6po=0xBA876544
|
||||
mcs1024qam6gb1po=0xCCBBBBBB
|
||||
mcs1024qam6gb2po=0xCCBBBBBB
|
||||
mcs1024qam6gb3po=0xDDBBBBBB
|
||||
mcs1024qam6gb4po=0xDDBBBBBB
|
||||
mcs1024qam6gb5po=0xEEEEDDDD
|
||||
mcs1024qam6gb6po=0xEEEEDDDD
|
||||
mcs4096qam6gb1po=0x33222211
|
||||
mcs4096qam6gb2po=0x33222211
|
||||
mcs4096qam6gb3po=0x44333322
|
||||
mcs4096qam6gb4po=0x44333322
|
||||
mcs4096qam6gb5po=0x22221100
|
||||
mcs4096qam6gb6po=0x22221100
|
||||
|
||||
## ULOFDMA Board limit PPRs for 6G20 ##
|
||||
ruppr6g20bpska0=0x83FE
|
||||
ruppr6g20bpska1=0x83FE
|
||||
ruppr6g20qpska0=0x18820
|
||||
ruppr6g20qpska1=0x18820
|
||||
ruppr6g20qam16a0=0x29062
|
||||
ruppr6g20qam16a1=0x29062
|
||||
ruppr6g20qam64a0=0x398A4
|
||||
ruppr6g20qam64a1=0x398A4
|
||||
ruppr6g20qam256a0=0x6B16A
|
||||
ruppr6g20qam256a1=0x6B16A
|
||||
ruppr6g20qam1024a0=0x7B9AC
|
||||
ruppr6g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G40 ##
|
||||
ruppr6g40bpska0=0x2083FE
|
||||
ruppr6g40bpska1=0x2083FE
|
||||
ruppr6g40qpska0=0x418820
|
||||
ruppr6g40qpska1=0x418820
|
||||
ruppr6g40qam16a0=0x629062
|
||||
ruppr6g40qam16a1=0x629062
|
||||
ruppr6g40qam64a0=0x8398A4
|
||||
ruppr6g40qam64a1=0x8398A4
|
||||
ruppr6g40qam256a0=0xE6B16A
|
||||
ruppr6g40qam256a1=0xE6B16A
|
||||
ruppr6g40qam1024a0=0x107B9AC
|
||||
ruppr6g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G80 ##
|
||||
ruppr6g80bpska0=0x102083FE
|
||||
ruppr6g80bpska1=0x102083FE
|
||||
ruppr6g80qpska0=0x18418820
|
||||
ruppr6g80qpska1=0x18418820
|
||||
ruppr6g80qam16a0=0x20629062
|
||||
ruppr6g80qam16a1=0x20629062
|
||||
ruppr6g80qam64a0=0x288398A4
|
||||
ruppr6g80qam64a1=0x288398A4
|
||||
ruppr6g80qam256a0=0x40E6B16A
|
||||
ruppr6g80qam256a1=0x40E6B16A
|
||||
ruppr6g80qam1024a0=0x4907B9AC
|
||||
ruppr6g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G160 ##
|
||||
ruppr6g160bpska0=0x102083FE
|
||||
ruppr6g160bpska1=0x102083FE
|
||||
ruppr6g160qpska0=0x18418820
|
||||
ruppr6g160qpska1=0x18418820
|
||||
ruppr6g160qam16a0=0x20629062
|
||||
ruppr6g160qam16a1=0x20629062
|
||||
ruppr6g160qam64a0=0x288398A4
|
||||
ruppr6g160qam64a1=0x288398A4
|
||||
ruppr6g160qam256a0=0x40E6B16A
|
||||
ruppr6g160qam256a1=0x40E6B16A
|
||||
ruppr6g160qam1024a0=0x4907B9AC
|
||||
ruppr6g160qam1024a1=0x4907B9AC
|
||||
|
||||
subband6gver=0x1
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00000020,0x00000020
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
remoteFEMlut_5g=0x8B8B8181, 0x81818181, 0x81818181, 0x8B8B8D8D, 0x8C8C8181, 0x81818181, 0x8E8E8F8F, 0x90909191, 0x81818181
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008282, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x101
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-63
|
||||
eu_edthresh5g=-63
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=4,4,4,4,3,3,3,3,3,3,7,7,7,7
|
||||
slice/1/felossTx2ga1=3,3,3,3,3,3,3,3,3,3,5,5,5,5
|
||||
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
felossTx5ga0=7,2,10,1
|
||||
felossTx5ga1=7,0,7,0
|
||||
felossRx5ga0=0,0,0,0
|
||||
felossRx5ga1=0,0,0,0
|
||||
felossTx6ga0=6,6,6,6,6,10
|
||||
felossTx6ga1=6,6,4,4,6,6
|
||||
felossRx6ga0=0,0,0,0,0,0
|
||||
felossRx6ga1=0,0,0,0,0,0
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2G20 ##
|
||||
ruppr2g20bpska0=0x83FE
|
||||
ruppr2g20bpska1=0x83FE
|
||||
ruppr2g20qpska0=0x18820
|
||||
ruppr2g20qpska1=0x18820
|
||||
ruppr2g20qam16a0=0x29062
|
||||
ruppr2g20qam16a1=0x29062
|
||||
ruppr2g20qam64a0=0x398A4
|
||||
ruppr2g20qam64a1=0x398A4
|
||||
ruppr2g20qam256a0=0x7B9AC
|
||||
ruppr2g20qam256a1=0x7B9AC
|
||||
ruppr2g20qam1024a0=0x83DCD
|
||||
ruppr2g20qam1024a1=0x83DCD
|
||||
## ULOFDMA Board limit PPRs for 5G20 ##
|
||||
ruppr5g20bpska0=0x83FE
|
||||
ruppr5g20bpska1=0x83FE
|
||||
ruppr5g20qpska0=0x18820
|
||||
ruppr5g20qpska1=0x18820
|
||||
ruppr5g20qam16a0=0x29062
|
||||
ruppr5g20qam16a1=0x29062
|
||||
ruppr5g20qam64a0=0x398A4
|
||||
ruppr5g20qam64a1=0x398A4
|
||||
ruppr5g20qam256a0=0x6B16A
|
||||
ruppr5g20qam256a1=0x6B16A
|
||||
ruppr5g20qam1024a0=0x7B9AC
|
||||
ruppr5g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G40 ##
|
||||
ruppr5g40bpska0=0x2083FE
|
||||
ruppr5g40bpska1=0x2083FE
|
||||
ruppr5g40qpska0=0x418820
|
||||
ruppr5g40qpska1=0x418820
|
||||
ruppr5g40qam16a0=0x629062
|
||||
ruppr5g40qam16a1=0x629062
|
||||
ruppr5g40qam64a0=0x8398A4
|
||||
ruppr5g40qam64a1=0x8398A4
|
||||
ruppr5g40qam256a0=0xE6B16A
|
||||
ruppr5g40qam256a1=0xE6B16A
|
||||
ruppr5g40qam1024a0=0x107B9AC
|
||||
ruppr5g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G80 ##
|
||||
ruppr5g80bpska0=0x102083FE
|
||||
ruppr5g80bpska1=0x102083FE
|
||||
ruppr5g80qpska0=0x18418820
|
||||
ruppr5g80qpska1=0x18418820
|
||||
ruppr5g80qam16a0=0x20629062
|
||||
ruppr5g80qam16a1=0x20629062
|
||||
ruppr5g80qam64a0=0x288398A4
|
||||
ruppr5g80qam64a1=0x288398A4
|
||||
ruppr5g80qam256a0=0x40E6B16A
|
||||
ruppr5g80qam256a1=0x40E6B16A
|
||||
ruppr5g80qam1024a0=0x4907B9AC
|
||||
ruppr5g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G160 ##
|
||||
ruppr5g160bpska0=0x102083FE
|
||||
ruppr5g160bpska1=0x102083FE
|
||||
ruppr5g160qpska0=0x18418820
|
||||
ruppr5g160qpska1=0x18418820
|
||||
ruppr5g160qam16a0=0x20629062
|
||||
ruppr5g160qam16a1=0x20629062
|
||||
ruppr5g160qam64a0=0x288398A4
|
||||
ruppr5g160qam64a1=0x288398A4
|
||||
ruppr5g160qam256a0=0x40E6B16A
|
||||
ruppr5g160qam256a1=0x40E6B16A
|
||||
ruppr5g160qam1024a0=0x4907B9AC
|
||||
ruppr5g160qam1024a1=0x4907B9AC
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
@@ -0,0 +1,650 @@
|
||||
# nvram for USI G6 SKU3 module V2.1 2023.09.11
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390a0GGmodUSIG6BB
|
||||
#SSID: 0x0aca
|
||||
#macmid: 0x055f
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Vendor1007>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1201
|
||||
boardtype=0x0aca
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002900
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:55:f0:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=16
|
||||
rxgains2gtrisoa0=17
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=15
|
||||
rxgains5gtrisoa0=17
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=15
|
||||
rxgains5gmtrisoa0=17
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=15
|
||||
rxgains5ghtrisoa0=17
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=16
|
||||
rxgains2gtrisoa1=17
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=15
|
||||
rxgains5gtrisoa1=17
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=15
|
||||
rxgains5gmtrisoa1=17
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=15
|
||||
rxgains5ghtrisoa1=17
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=2
|
||||
rxgains2gfelossa1=2
|
||||
rxgains5gfelossa0=2
|
||||
rxgains5gfelossa1=2
|
||||
rxgains5gmfelossa0=1
|
||||
rxgains5gmfelossa1=1
|
||||
rxgains5ghfelossa0=1
|
||||
rxgains5ghfelossa1=1
|
||||
|
||||
rxgains6gelnagaina0=15
|
||||
rxgains6gtrisoa0=17
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=15
|
||||
rxgains6gmtrisoa0=17
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=15
|
||||
rxgains6ghtrisoa0=17
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=1
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=15
|
||||
rxgains6gtrisoa1=17
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=15
|
||||
rxgains6gmtrisoa1=17
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=15
|
||||
rxgains6ghtrisoa1=17
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=1
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related for dedicated mode in qdBm
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=0,0,3,1,0,0,3,1,-1,1,1,-1,-1,1,1,-1
|
||||
rssi_delta_2gb1=0,0,2,0,0,0,2,0,-2,1,0,-2,-2,1,0,-2
|
||||
rssi_delta_2gb2=0,0,2,0,0,0,2,0,-2,1,0,-2,-2,1,0,-2
|
||||
rssi_delta_2gb3=0,1,2,0,0,1,2,0,-1,1,0,-3,-1,1,0,-3
|
||||
rssi_delta_2gb4=1,1,2,-1,1,1,2,-1,-1,1,0,-3,-1,1,0,-3
|
||||
rssi_delta_5gl=-10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6
|
||||
rssi_delta_5gml=-5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2
|
||||
rssi_delta_5gmu=-6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0
|
||||
rssi_delta_5gh=-5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1
|
||||
rssi_delta_6gb0=-6,8,2,3,-6,8,2,3,-6,8,2,3,-6,8,2,3,-8,8,1,3,-8,8,1,3,-8,8,1,3,-8,8,1,3
|
||||
rssi_delta_6gb1=-6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4
|
||||
rssi_delta_6gb2=-3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5
|
||||
rssi_delta_6gb3=-3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6
|
||||
rssi_delta_6gb4=0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11
|
||||
rssi_delta_6gb5=1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10
|
||||
#RSSI compensation parameters for 2G FBC and 5G/6G scan core in qdBm
|
||||
rssi_delta_2gb0_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb1_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb2_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb3_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
rssi_delta_2gb4_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm5g_c0=0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/rssicorrnorm6g_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
gain_cal_temp=36
|
||||
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
#cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=4
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_profile_2g=7,0,0,16,20,28,36,44,48,169,-500,-590,70,0,-70,590,500,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=0
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=0
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=420,420,354,354
|
||||
AvVmid_c0=0,178,0,178,0,179,0,185,0,191
|
||||
AvVmid_c1=0,180,0,180,0,181,0,186,0,191
|
||||
AvVmid_6g_c0=0,194,0,199,0,200,0,200,0,202,0,202
|
||||
AvVmid_6g_c1=0,194,0,200,0,200,0,201,0,205,0,203
|
||||
slice/1/AvVmid_c0=0,173
|
||||
slice/1/AvVmid_c1=0,188
|
||||
|
||||
pacalver_nvram=0x1
|
||||
# Calculate window: 5~26 (20230919 Cal by USI on socket brd)
|
||||
slice/1/pa2ga0=0x0026,0x1f5e,0xfbb1
|
||||
slice/1/pa2ga1=0xfff6,0x1fd5,0xfbc3
|
||||
# Calculate window: 8~25 (20230919 Cal by USI on socket brd)
|
||||
pa5ga0=0x0026,0x1edc,0xfba1,0x000b,0x1e96,0xfb72,0x001d,0x1ead,0xfbac,0x0027,0x1ebf,0xfba0
|
||||
pa5ga1=0xfff3,0x1e8b,0xfb7d,0xfff3,0x1ee2,0xfb49,0xfffd,0x1f50,0xfb82,0xffed,0x1fa4,0xfb3b
|
||||
# Calculate window: 8~23 (20230919 Cal by USI on socket brd)
|
||||
pa6ga0=0x0046,0x1f09,0xfba4,0x0046,0x1f7e,0xfb94,0x0016,0x1dc6,0xfbca,0x0049,0x1fdf,0xfb9d,0x0048,0x1f63,0xfb9d,0x0027,0x1e24,0xfbb9
|
||||
pa6ga1=0x0001,0x1f20,0xfb6c,0x0003,0x1e57,0xfb55,0x001d,0x1e4b,0xfb77,0x0005,0x1e02,0xfb6f,0x0019,0x1e47,0xfb69,0x0010,0x1e3e,0xfb5d
|
||||
|
||||
# Max power and offsets
|
||||
slice/1/powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
#slice/1/pdoffsetcckma0=1
|
||||
#slice/1/pdoffsetcckma1=1
|
||||
|
||||
maxp2ga0=97
|
||||
maxp2ga1=94
|
||||
maxp5ga0=94,90,91,88
|
||||
maxp5ga1=92,87,86,86
|
||||
maxp6ga0=88,88,86,86,83,85
|
||||
maxp6ga1=85,85,84,84,74,76
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
slice/1/cckpwroffset0=0x6
|
||||
slice/1/cckpwroffset1=0x8
|
||||
pdoffset40ma0=0x5676
|
||||
pdoffset40ma1=0x6676
|
||||
pdoffset80ma0=0x4576
|
||||
pdoffset80ma1=0x4576
|
||||
pdoffset160ma0=0x6755
|
||||
pdoffset160ma1=0x7765
|
||||
pdoffset6g40ma0=0x776677
|
||||
pdoffset6g40ma1=0x777777
|
||||
pdoffset6g80ma0=0x776655
|
||||
pdoffset6g80ma1=0x556655
|
||||
pdoffset6g160ma0=0x777777
|
||||
pdoffset6g160ma1=0x777777
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0x1111
|
||||
mcsbw202gpo=0xEB975543
|
||||
dot11agofdmhrbw202gpo=0x7444
|
||||
ofdmlrbw202gpo=0x3133
|
||||
mcs1024qam2gpo=0x66
|
||||
mcsbw205glpo=0xA9753100
|
||||
mcsbw405glpo=0xA9865444
|
||||
mcsbw805glpo=0xA9865555
|
||||
mcsbw1605glpo=0xBA987777
|
||||
mcsbw205gmpo=0xA9753100
|
||||
mcsbw405gmpo=0xA9864333
|
||||
mcsbw805gmpo=0xA9864444
|
||||
mcsbw1605gmpo=0xA9887766
|
||||
mcsbw205ghpo=0xA9753100
|
||||
mcsbw405ghpo=0xA9865444
|
||||
mcsbw805ghpo=0xA9865555
|
||||
mcsbw1605ghpo=0xBA987777
|
||||
mcs1024qam5glpo=0xDDDDDDDD
|
||||
mcs1024qam5gmpo=0xDDCCCCCC
|
||||
mcs1024qam5ghpo=0xFFDDDDDD
|
||||
mcs4096qam5glpo=0x33111111
|
||||
mcs4096qam5gmpo=0x55331111
|
||||
mcs4096qam5ghpo=0x66555544
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
## For both 2G and 5G
|
||||
mcs10poexp=0x00000001
|
||||
mcs11poexp=0x00000001
|
||||
mcs12poexp=0xffffffff
|
||||
mcs13poexp=0xffffffff
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0x86431000
|
||||
mcsbw406gb1po=0x87542222
|
||||
mcsbw806gb1po=0x98633333
|
||||
mcsbw1606gb1po=0xA9744444
|
||||
mcsbw206gb2po=0x86431000
|
||||
mcsbw406gb2po=0x87542222
|
||||
mcsbw806gb2po=0x98633333
|
||||
mcsbw1606gb2po=0xA9744444
|
||||
mcsbw206gb3po=0xA8643222
|
||||
mcsbw406gb3po=0xA9543444
|
||||
mcsbw806gb3po=0xBA654555
|
||||
mcsbw1606gb3po=0xCB876666
|
||||
mcsbw206gb4po=0xA8643222
|
||||
mcsbw406gb4po=0xA9543444
|
||||
mcsbw806gb4po=0xBA654555
|
||||
mcsbw1606gb4po=0xCB876666
|
||||
mcsbw206gb5po=0xB9743222
|
||||
mcsbw406gb5po=0xBA855444
|
||||
mcsbw806gb5po=0xBA876544
|
||||
mcsbw1606gb5po=0xBA876544
|
||||
mcsbw206gb6po=0xB9743222
|
||||
mcsbw406gb6po=0xBA855444
|
||||
mcsbw806gb6po=0xBA876544
|
||||
mcsbw1606gb6po=0xBA876544
|
||||
mcs1024qam6gb1po=0xCCBBBBBB
|
||||
mcs1024qam6gb2po=0xCCBBBBBB
|
||||
mcs1024qam6gb3po=0xDDBBBBBB
|
||||
mcs1024qam6gb4po=0xDDBBBBBB
|
||||
mcs1024qam6gb5po=0xEEEEDDDD
|
||||
mcs1024qam6gb6po=0xEEEEDDDD
|
||||
mcs4096qam6gb1po=0x33222211
|
||||
mcs4096qam6gb2po=0x33222211
|
||||
mcs4096qam6gb3po=0x44333322
|
||||
mcs4096qam6gb4po=0x44333322
|
||||
mcs4096qam6gb5po=0x22221100
|
||||
mcs4096qam6gb6po=0x22221100
|
||||
## For 6G only
|
||||
mcs10poexp6g=0x00000000
|
||||
mcs11poexp6g=0x00000000
|
||||
mcs12poexp6g=0xffffffff
|
||||
mcs13poexp6g=0xffffffff
|
||||
|
||||
## ULOFDMA Board limit PPRs for 6G20 ##
|
||||
ruppr6g20bpska0=0x83FE
|
||||
ruppr6g20bpska1=0x83FE
|
||||
ruppr6g20qpska0=0x18820
|
||||
ruppr6g20qpska1=0x18820
|
||||
ruppr6g20qam16a0=0x29062
|
||||
ruppr6g20qam16a1=0x29062
|
||||
ruppr6g20qam64a0=0x398A4
|
||||
ruppr6g20qam64a1=0x398A4
|
||||
ruppr6g20qam256a0=0x6B16A
|
||||
ruppr6g20qam256a1=0x6B16A
|
||||
ruppr6g20qam1024a0=0x7B9AC
|
||||
ruppr6g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G40 ##
|
||||
ruppr6g40bpska0=0x2083FE
|
||||
ruppr6g40bpska1=0x2083FE
|
||||
ruppr6g40qpska0=0x418820
|
||||
ruppr6g40qpska1=0x418820
|
||||
ruppr6g40qam16a0=0x629062
|
||||
ruppr6g40qam16a1=0x629062
|
||||
ruppr6g40qam64a0=0x8398A4
|
||||
ruppr6g40qam64a1=0x8398A4
|
||||
ruppr6g40qam256a0=0xE6B16A
|
||||
ruppr6g40qam256a1=0xE6B16A
|
||||
ruppr6g40qam1024a0=0x107B9AC
|
||||
ruppr6g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G80 ##
|
||||
ruppr6g80bpska0=0x102083FE
|
||||
ruppr6g80bpska1=0x102083FE
|
||||
ruppr6g80qpska0=0x18418820
|
||||
ruppr6g80qpska1=0x18418820
|
||||
ruppr6g80qam16a0=0x20629062
|
||||
ruppr6g80qam16a1=0x20629062
|
||||
ruppr6g80qam64a0=0x288398A4
|
||||
ruppr6g80qam64a1=0x288398A4
|
||||
ruppr6g80qam256a0=0x40E6B16A
|
||||
ruppr6g80qam256a1=0x40E6B16A
|
||||
ruppr6g80qam1024a0=0x4907B9AC
|
||||
ruppr6g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 6G160 ##
|
||||
ruppr6g160bpska0=0x102083FE
|
||||
ruppr6g160bpska1=0x102083FE
|
||||
ruppr6g160qpska0=0x18418820
|
||||
ruppr6g160qpska1=0x18418820
|
||||
ruppr6g160qam16a0=0x20629062
|
||||
ruppr6g160qam16a1=0x20629062
|
||||
ruppr6g160qam64a0=0x288398A4
|
||||
ruppr6g160qam64a1=0x288398A4
|
||||
ruppr6g160qam256a0=0x40E6B16A
|
||||
ruppr6g160qam256a1=0x40E6B16A
|
||||
ruppr6g160qam1024a0=0x4907B9AC
|
||||
ruppr6g160qam1024a1=0x4907B9AC
|
||||
|
||||
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,-12
|
||||
mppc_runtime_cal_en=1
|
||||
mppc_pa_gain_delta_qdb=48
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x80808181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008282, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x101
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-72,-72
|
||||
ed_thresh_sec5g=-72
|
||||
ed_thresh_sec6g=-72,-72
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-63
|
||||
eu_edthresh5g=-72
|
||||
eu_edthresh6g=-72,-72
|
||||
eu_edthresh_sec5g=-72
|
||||
eu_edthresh_sec6g=-72,-72
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=5,5,5,5,4,4,4,4,5,6,6,7,7,7
|
||||
slice/1/felossTx2ga1=3,3,3,3,3,3,3,3,3,3,3,4,4,4
|
||||
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,1,1,1
|
||||
slice/1/felossRx2ga1=2,2,2,2,2,2,2,2,2,2,2,7,7,7
|
||||
felossTx5ga0=14,10,11,8
|
||||
felossTx5ga1=12,7,6,6
|
||||
felossRx5ga0=0,0,0,0
|
||||
felossRx5ga1=0,0,0,0
|
||||
felossTx6ga0=10,10,8,8,13,15
|
||||
felossTx6ga1=7,7,6,6,4,6
|
||||
felossRx6ga0=0,0,0,0,0,0
|
||||
felossRx6ga1=0,0,0,0,0,0
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2G20 ##
|
||||
ruppr2g20bpska0=0x83FE
|
||||
ruppr2g20bpska1=0x83FE
|
||||
ruppr2g20qpska0=0x18820
|
||||
ruppr2g20qpska1=0x18820
|
||||
ruppr2g20qam16a0=0x29062
|
||||
ruppr2g20qam16a1=0x29062
|
||||
ruppr2g20qam64a0=0x398A4
|
||||
ruppr2g20qam64a1=0x398A4
|
||||
ruppr2g20qam256a0=0x7B9AC
|
||||
ruppr2g20qam256a1=0x7B9AC
|
||||
ruppr2g20qam1024a0=0x83DCD
|
||||
ruppr2g20qam1024a1=0x83DCD
|
||||
## ULOFDMA Board limit PPRs for 5G20 ##
|
||||
ruppr5g20bpska0=0x83FE
|
||||
ruppr5g20bpska1=0x83FE
|
||||
ruppr5g20qpska0=0x18820
|
||||
ruppr5g20qpska1=0x18820
|
||||
ruppr5g20qam16a0=0x29062
|
||||
ruppr5g20qam16a1=0x29062
|
||||
ruppr5g20qam64a0=0x398A4
|
||||
ruppr5g20qam64a1=0x398A4
|
||||
ruppr5g20qam256a0=0x6B16A
|
||||
ruppr5g20qam256a1=0x6B16A
|
||||
ruppr5g20qam1024a0=0x7B9AC
|
||||
ruppr5g20qam1024a1=0x7B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G40 ##
|
||||
ruppr5g40bpska0=0x2083FE
|
||||
ruppr5g40bpska1=0x2083FE
|
||||
ruppr5g40qpska0=0x418820
|
||||
ruppr5g40qpska1=0x418820
|
||||
ruppr5g40qam16a0=0x629062
|
||||
ruppr5g40qam16a1=0x629062
|
||||
ruppr5g40qam64a0=0x8398A4
|
||||
ruppr5g40qam64a1=0x8398A4
|
||||
ruppr5g40qam256a0=0xE6B16A
|
||||
ruppr5g40qam256a1=0xE6B16A
|
||||
ruppr5g40qam1024a0=0x107B9AC
|
||||
ruppr5g40qam1024a1=0x107B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G80 ##
|
||||
ruppr5g80bpska0=0x102083FE
|
||||
ruppr5g80bpska1=0x102083FE
|
||||
ruppr5g80qpska0=0x18418820
|
||||
ruppr5g80qpska1=0x18418820
|
||||
ruppr5g80qam16a0=0x20629062
|
||||
ruppr5g80qam16a1=0x20629062
|
||||
ruppr5g80qam64a0=0x288398A4
|
||||
ruppr5g80qam64a1=0x288398A4
|
||||
ruppr5g80qam256a0=0x40E6B16A
|
||||
ruppr5g80qam256a1=0x40E6B16A
|
||||
ruppr5g80qam1024a0=0x4907B9AC
|
||||
ruppr5g80qam1024a1=0x4907B9AC
|
||||
## ULOFDMA Board limit PPRs for 5G160 ##
|
||||
ruppr5g160bpska0=0x102083FE
|
||||
ruppr5g160bpska1=0x102083FE
|
||||
ruppr5g160qpska0=0x18418820
|
||||
ruppr5g160qpska1=0x18418820
|
||||
ruppr5g160qam16a0=0x20629062
|
||||
ruppr5g160qam16a1=0x20629062
|
||||
ruppr5g160qam64a0=0x288398A4
|
||||
ruppr5g160qam64a1=0x288398A4
|
||||
ruppr5g160qam256a0=0x40E6B16A
|
||||
ruppr5g160qam256a1=0x40E6B16A
|
||||
ruppr5g160qam1024a0=0x4907B9AC
|
||||
ruppr5g160qam1024a1=0x4907B9AC
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
@@ -0,0 +1,681 @@
|
||||
# nvram for USI G6 SKU3 module(4390B0) V2.5 2023.11.17
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390b0GGmodUSIG6BB
|
||||
#SSID: 0x0af4
|
||||
#macmid: 0x0597
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Vendor1007>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1205
|
||||
boardtype=0x0af4
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002900
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:59:70:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=16
|
||||
rxgains2gtrisoa0=17
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=15
|
||||
rxgains5gtrisoa0=17
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=15
|
||||
rxgains5gmtrisoa0=17
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=15
|
||||
rxgains5ghtrisoa0=17
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=16
|
||||
rxgains2gtrisoa1=17
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=15
|
||||
rxgains5gtrisoa1=17
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=15
|
||||
rxgains5gmtrisoa1=17
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=15
|
||||
rxgains5ghtrisoa1=17
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=2
|
||||
rxgains2gfelossa1=2
|
||||
rxgains5gfelossa0=2
|
||||
rxgains5gfelossa1=2
|
||||
rxgains5gmfelossa0=1
|
||||
rxgains5gmfelossa1=1
|
||||
rxgains5ghfelossa0=1
|
||||
rxgains5ghfelossa1=1
|
||||
|
||||
rxgains6gelnagaina0=15
|
||||
rxgains6gtrisoa0=17
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=15
|
||||
rxgains6gmtrisoa0=17
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=15
|
||||
rxgains6ghtrisoa0=17
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=1
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=15
|
||||
rxgains6gtrisoa1=17
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=15
|
||||
rxgains6gmtrisoa1=17
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=15
|
||||
rxgains6ghtrisoa1=17
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=1
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related for dedicated mode in qdBm (Calibrated on USI 60 pin EVB 2023/10/31)
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=1,2,2,0,1,2,2,0,0,4,2,1,0,4,2,1
|
||||
rssi_delta_2gb1=1,2,2,0,1,2,2,0,1,4,2,1,1,4,2,1
|
||||
rssi_delta_2gb2=1,2,2,0,1,2,2,0,0,4,2,1,0,4,2,1
|
||||
rssi_delta_2gb3=1,2,2,0,1,2,2,0,1,5,3,1,1,5,3,1
|
||||
rssi_delta_2gb4=1,2,2,0,1,2,2,0,1,5,3,2,1,5,3,2
|
||||
rssi_delta_2gb0_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb1_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb2_fbc=0,1,2,0,0,1,2,0,0,1,2,0,0,1,2,0
|
||||
rssi_delta_2gb3_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb4_fbc=1,2,2,0,1,2,2,0,1,2,2,0,1,2,2,0
|
||||
rssi_delta_5gl=-10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6
|
||||
rssi_delta_5gml=-5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2
|
||||
rssi_delta_5gmu=-6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0
|
||||
rssi_delta_5gh=-5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1
|
||||
rssi_delta_6gb0=-6,8,2,3,-6,8,2,3,-6,8,2,3,-6,8,2,3,-8,8,1,3,-8,8,1,3,-8,8,1,3,-8,8,1,3
|
||||
rssi_delta_6gb1=-6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4
|
||||
rssi_delta_6gb2=-3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5
|
||||
rssi_delta_6gb3=-3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6
|
||||
rssi_delta_6gb4=0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11
|
||||
rssi_delta_6gb5=1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10
|
||||
slice/2/rssicorrnorm5g_c0=3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3
|
||||
slice/2/rssicorrnorm6g_c0=8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8
|
||||
slice/1/tone_to_pkt_rssi_offset=-4,-4,-4,-4
|
||||
tone_to_pkt_rssi_offset=-12,-8,-12,-8,-8,-8,-8,-4,-12,-8,-12,-8,-8,-8,-8,-4
|
||||
tone_to_pkt_rssi_offset_6g=-8,-8,-8,-8,-8,-8,-8,-4,-8,-8,-8,-8,-8,-8,-8,-4
|
||||
gain_cal_temp=36
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
|
||||
xtalfreq=76800
|
||||
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
cck_onecore_tx=1
|
||||
|
||||
cckdigfilttype=0
|
||||
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_profile_2g=7,0,0,16,20,28,36,44,48,169,-500,-590,70,0,-70,590,500,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=1
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=1
|
||||
slice/1/olpc_thresh2g=28
|
||||
slice/1/olpc_anchor2g=28
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
# 20231128 Updated on the module socket board
|
||||
hwolpc_offset_c0=0x00,0x03000101,0x03FF0001,0x04000101,0x02000102
|
||||
hwolpc_offset6g_c0=0x04010201,0x03FF0000,0x03FF0001,0x02FF0000,0x03000101,0x04000001
|
||||
hwolpc_offset_c1=0x01,0x02000101,0x02FF0001,0x04000101,0x02FF0001
|
||||
hwolpc_offset6g_c1=0x05FF0001,0x02000101,0x03000000,0x03000001,0x02FF0100,0x03FF0101
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=420,420,354,354
|
||||
AvVmid_c0=0,178,0,178,0,179,0,185,0,191
|
||||
AvVmid_c1=0,180,0,180,0,181,0,186,0,191
|
||||
AvVmid_6g_c0=0,194,0,199,0,200,0,200,0,202,0,202
|
||||
AvVmid_6g_c1=0,194,0,200,0,200,0,201,0,205,0,203
|
||||
slice/1/AvVmid_c0=0,173
|
||||
slice/1/AvVmid_c1=0,188
|
||||
|
||||
pacalver_nvram=0x1
|
||||
#11/23 Generated with 7 modules on module socket board and optimized by BRCM
|
||||
#slice/1/pa2ga0=-12,8863,-1090
|
||||
slice/1/pa2ga0=-12,8735,-1089
|
||||
slice/1/pa2ga1=-24,8950,-1056
|
||||
#pa5ga0=96,8410,-1280,103,8469,-1315,89,8308,-1269,91,8305,-1280
|
||||
#pa5ga1=90,8380,-1304,87,8369,-1327,86,8501,-1284,95,8569,-1290
|
||||
pa5ga0=96,8282,-1286,103,8469,-1315,89,8372,-1266,91,8369,-1277
|
||||
pa5ga1=90,8316,-1307,87,8433,-1325,86,8437,-1287,95,8441,-1296
|
||||
pa6ga0=100,8386,-1271,101,8512,-1283,100,8451,-1258,105,8558,-1271,111,8421,-1276,116,8514,-1292
|
||||
pa6ga1=82,8251,-1274,81,8279,-1291,71,8231,-1263,76,8387,-1272,78,7997,-1273,76,8174,-1279
|
||||
# Max power and offsets
|
||||
slice/1/powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffsetcckma0=5
|
||||
slice/1/pdoffsetcckma1=5
|
||||
|
||||
maxp2ga0=97
|
||||
maxp2ga1=95
|
||||
maxp5ga0=90,90,91,91
|
||||
maxp5ga1=89,90,90,88
|
||||
maxp6ga0=84,84,86,86,88,88
|
||||
maxp6ga1=83,83,84,84,84,84
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
#11/21 updated on the module socket board
|
||||
pdoffset40ma0=0x7666
|
||||
pdoffset80ma0=0x7667
|
||||
pdoffset160ma0=0x7677
|
||||
pdoffset40ma1=0x6555
|
||||
pdoffset80ma1=0x4254
|
||||
pdoffset160ma1=0x5555
|
||||
pdoffset6g40ma0=0x777777
|
||||
pdoffset6g40ma1=0x666667
|
||||
pdoffset6g80ma0=0x555555
|
||||
pdoffset6g80ma1=0x774455
|
||||
pdoffset6g160ma0=0x335544
|
||||
pdoffset6g160ma1=0x555555
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0x0000
|
||||
mcsbw202gpo=0xDA975422
|
||||
dot11agofdmhrbw202gpo=0x7432
|
||||
ofdmlrbw202gpo=0x3000
|
||||
mcs1024qam2gpo=0x00
|
||||
mcsbw205glpo=0xCB975422
|
||||
mcsbw405glpo=0xFDA99655
|
||||
mcsbw805glpo=0xDBA88555
|
||||
mcsbw1605glpo=0xEDBBB888
|
||||
mcsbw205gmpo=0xBB975422
|
||||
mcsbw405gmpo=0xCB998655
|
||||
mcsbw805gmpo=0xBBA99777
|
||||
mcsbw1605gmpo=0xDDBBBAAA
|
||||
mcsbw205ghpo=0xA9753200
|
||||
mcsbw405ghpo=0x99766333
|
||||
mcsbw805ghpo=0xA9766444
|
||||
mcsbw1605ghpo=0xB8777554
|
||||
mcs1024qam5glpo=0x00FF22FF
|
||||
mcs1024qam5gmpo=0x00EE11DD
|
||||
mcs1024qam5ghpo=0x00CC11CB
|
||||
mcs4096qam5glpo=0x33335021
|
||||
mcs4096qam5gmpo=0x00000000
|
||||
mcs4096qam5ghpo=0x00000000
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
## For both 2G and 5G
|
||||
mcs10poexp=0xfff1fff1
|
||||
mcs11poexp=0xfff1fff1
|
||||
mcs12poexp=0xffffffff
|
||||
mcs13poexp=0xffffffff
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0xA8653200
|
||||
mcsbw406gb1po=0xA9875332
|
||||
mcsbw806gb1po=0xA9866444
|
||||
mcsbw1606gb1po=0xBA988555
|
||||
mcsbw206gb2po=0xA8653200
|
||||
mcsbw406gb2po=0xA9875332
|
||||
mcsbw806gb2po=0xA9866444
|
||||
mcsbw1606gb2po=0xBA988555
|
||||
mcsbw206gb3po=0xBA875422
|
||||
mcsbw406gb3po=0xBA976554
|
||||
mcsbw806gb3po=0xBA988666
|
||||
mcsbw1606gb3po=0xCCAAA777
|
||||
mcsbw206gb4po=0xBA875422
|
||||
mcsbw406gb4po=0xBA976554
|
||||
mcsbw806gb4po=0xBA988666
|
||||
mcsbw1606gb4po=0xCCAAA777
|
||||
mcsbw206gb5po=0xECA97644
|
||||
mcsbw406gb5po=0xDCBA9776
|
||||
mcsbw806gb5po=0xDCBBB999
|
||||
mcsbw1606gb5po=0xDDCCCAAA
|
||||
mcsbw206gb6po=0xECA97644
|
||||
mcsbw406gb6po=0xDCBA9776
|
||||
mcsbw806gb6po=0xDCBBB999
|
||||
mcsbw1606gb6po=0xDDCCCAAA
|
||||
mcs1024qam6gb1po=0xCCCCCBBB
|
||||
mcs1024qam6gb2po=0xCCCCCBBB
|
||||
mcs1024qam6gb3po=0xDDDDCCBB
|
||||
mcs1024qam6gb4po=0xDDDDCCBB
|
||||
mcs1024qam6gb5po=0xFFFFFFFF
|
||||
mcs1024qam6gb6po=0xFFFFFFFF
|
||||
mcs4096qam6gb1po=0x00000000
|
||||
mcs4096qam6gb2po=0x00000000
|
||||
mcs4096qam6gb3po=0x00000000
|
||||
mcs4096qam6gb4po=0x00000000
|
||||
mcs4096qam6gb5po=0x00000000
|
||||
mcs4096qam6gb6po=0x00000000
|
||||
|
||||
## For 6G only
|
||||
mcs10poexp6g=0x00000000
|
||||
mcs11poexp6g=0x00000000
|
||||
mcs12poexp6g=0xffffffff
|
||||
mcs13poexp6g=0xffffffff
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2g20 ##
|
||||
ruppr2g20bpsk=0x1c718c63,0x070c31c7
|
||||
ruppr2g20qpsk=0x1c721084,0x071041c7
|
||||
ruppr2g20qam16=0x1c7294a5,0x071451c7
|
||||
ruppr2g20qam64=0x1c739ce7,0x071c71c7
|
||||
ruppr2g20qam256=0x1c76b5ad,0x0734d1c7
|
||||
ruppr2g20qam1024=0x1c77bdef,0x074511c7
|
||||
ruppr2g20qam4096=0x1c739ce7,0x071c71c7
|
||||
## ULOFDMA Board limit PPRs for 5g20 ##
|
||||
ruppr5g20bpsk=0x08208421,0x02041082
|
||||
ruppr5g20qpsk=0x08210842,0x02082082
|
||||
ruppr5g20qam16=0x08218c63,0x020c3082
|
||||
ruppr5g20qam64=0x082294a5,0x02145082
|
||||
ruppr5g20qam256=0x0824a529,0x02249082
|
||||
ruppr5g20qam1024=0x0826b5ad,0x0234d082
|
||||
ruppr5g20qam4096=0x0827bdef,0x02451082
|
||||
## ULOFDMA Board limit PPRs for 5g40 ##
|
||||
ruppr5g40bpsk=0x08318c63,0x030c3082
|
||||
ruppr5g40qpsk=0x08421084,0x04104082
|
||||
ruppr5g40qam16=0x085294a5,0x05145082
|
||||
ruppr5g40qam64=0x08842108,0x08208082
|
||||
ruppr5g40qam256=0x08b5ad6b,0x0b2cb082
|
||||
ruppr5g40qam1024=0x08d6b5ad,0x0d34d082
|
||||
ruppr5g40qam4096=0x0927bdef,0x12492082
|
||||
## ULOFDMA Board limit PPRs for 5g80 ##
|
||||
ruppr5g80bpsk=0x10421084,0x04104082
|
||||
ruppr5g80qpsk=0x10421084,0x04104082
|
||||
ruppr5g80qam16=0x186318c6,0x06186082
|
||||
ruppr5g80qam64=0x20842108,0x08208082
|
||||
ruppr5g80qam256=0x2cb5ad6b,0x0b2cb082
|
||||
ruppr5g80qam1024=0x38e739ce,0x0e38e082
|
||||
ruppr5g80qam4096=0x4927bdef,0x12492082
|
||||
## ULOFDMA Board limit PPRs for 5g160 ##
|
||||
ruppr5g160bpsk=0x1c739ce7,0x071c7087,0x02082000
|
||||
ruppr5g160qpsk=0x1c739ce7,0x071c7087,0x02082082
|
||||
ruppr5g160qam16=0x20842108,0x08208088,0x02082104
|
||||
ruppr5g160qam64=0x30c6318c,0x0c30c08c,0x02082186
|
||||
ruppr5g160qam256=0x3cf7bdef,0x0f3cf08f,0x02082208
|
||||
ruppr5g160qam1024=0x4517bdef,0x11451091,0x0208228a
|
||||
ruppr5g160qam4096=0x4d37bdef,0x134d3093,0x0208238e
|
||||
## ULOFDMA Board limit PPRs for 6g20 ##
|
||||
ruppr6g20bpsk=0x04108421,0x01041041
|
||||
ruppr6g20qpsk=0x04108421,0x01041041
|
||||
ruppr6g20qam16=0x04118c63,0x030c3041
|
||||
ruppr6g20qam64=0x04139ce7,0x071c7041
|
||||
ruppr6g20qam256=0x0414a529,0x09249041
|
||||
ruppr6g20qam1024=0x0415294a,0x0a28a041
|
||||
ruppr6g20qam4096=0x0417bdef,0x10410041
|
||||
## ULOFDMA Board limit PPRs for 6g40 ##
|
||||
ruppr6g40bpsk=0x04210842,0x02082041
|
||||
ruppr6g40qpsk=0x04318c63,0x030c3041
|
||||
ruppr6g40qam16=0x045294a5,0x05145041
|
||||
ruppr6g40qam64=0x04739ce7,0x071c7041
|
||||
ruppr6g40qam256=0x0494a529,0x09249041
|
||||
ruppr6g40qam1024=0x04c6318c,0x0c30c041
|
||||
ruppr6g40qam4096=0x0517bdef,0x11451041
|
||||
## ULOFDMA Board limit PPRs for 6g80 ##
|
||||
ruppr6g80bpsk=0x0c318c63,0x030c3041
|
||||
ruppr6g80qpsk=0x145294a5,0x05145041
|
||||
ruppr6g80qam16=0x1c739ce7,0x071c7041
|
||||
ruppr6g80qam64=0x28a5294a,0x0a28a041
|
||||
ruppr6g80qam256=0x30c6318c,0x0c30c041
|
||||
ruppr6g80qam1024=0x38e739ce,0x0e38e041
|
||||
ruppr6g80qam4096=0x4927bdef,0x12492041
|
||||
## ULOFDMA Board limit PPRs for 6g160 ##
|
||||
ruppr6g160bpsk=0x186318c6,0x06186046,0x01041186
|
||||
ruppr6g160qpsk=0x1c739ce7,0x071c7047,0x010411c7
|
||||
ruppr6g160qam16=0x2494a529,0x09249049,0x01041249
|
||||
ruppr6g160qam64=0x28a5294a,0x0a28a04a,0x0104128a
|
||||
ruppr6g160qam256=0x30c6318c,0x0c30c04c,0x0104130c
|
||||
ruppr6g160qam1024=0x38e739ce,0x0e38e04e,0x0104138e
|
||||
ruppr6g160qam4096=0x4927bdef,0x12492052,0x01041492
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_2g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_2g=-128,20
|
||||
#slice/1/mppc_gaindelta_pa1=44
|
||||
slice/1/mppc_gaindelta_pa1=42
|
||||
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,12
|
||||
#mppc_gaindelta_pa0=0,14,14,14,14,16,16,16,16,16,16
|
||||
#Based on CLPC power delta
|
||||
mppc_gaindelta_pa0=0,15,17,17,20,24,25,24,27,27,20
|
||||
mppc_gaindelta_pa1=0,30,30,29,29,30,26,27,26,29,27
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x93938181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008383, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x1
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-71,-71
|
||||
ed_thresh_sec5g=-72
|
||||
ed_thresh_sec6g=-71,-71
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-59
|
||||
eu_edthresh5g=-65
|
||||
eu_edthresh6g=-68,-59
|
||||
eu_edthresh_sec5g=-64
|
||||
eu_edthresh_sec6g=-69,-59
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=8,8,8,8,8,8,8,8,8,9,9,10,10,10
|
||||
slice/1/felossTx2ga1=7,7,7,7,7,7,7,7,7,7,7,7,7,7
|
||||
slice/1/felossRx2ga0=7,7,7,7,4,4,4,4,6,6,9,10,10,10
|
||||
slice/1/felossRx2ga1=4,4,4,4,4,4,4,4,4,4,6,6,6,6
|
||||
felossTx5ga0=10,10,11,11
|
||||
felossTx5ga1=9,10,10,8
|
||||
felossRx5ga0=12,11,8,11
|
||||
felossRx5ga1=11,8,4,8
|
||||
felossTx6ga0=6,6,8,8,10,10
|
||||
felossTx6ga1=5,5,6,6,6,6
|
||||
felossRx6ga0=9,11,10,10,13,15
|
||||
felossRx6ga1=8,8,12,12,10,8
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
##Dynamic SAR related Params
|
||||
dynsar_fcc_rev=0xFF
|
||||
|
||||
###LPC EPABYPASS MODE
|
||||
lpc_epabypass_en=1
|
||||
lpc_epabypass_maxpwr=-10
|
||||
lpc_epagain=60
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
lesi_desoffset_20MHzextra=1,1,1
|
||||
|
||||
#scan5g elnabyp
|
||||
slice/2/scan_ebyp_ncc=1
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
|
||||
## List of duty cycle temperature thresholds in descending order (num = 3)
|
||||
tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/tvpm_dc_temp_threshold=110,105,100
|
||||
|
||||
# 5G K values for 11AZ Update on 20240506
|
||||
az_offset_perbw=0,0,0,0,0
|
||||
az_160mkval=13737,14382
|
||||
az_80mkval=12621,11747,12891,12307,12541,12500
|
||||
az_40mkval=18345,17772,17749,17042,18066,18821,18682,17671,18330,17408,17483,17593
|
||||
az_20mkval=47443,47052,46332,46341,45992,46793,45675,46296,47196,47288,47311,47001,46873,47148,46399,45777,46325,46876,46793,45582,46126,46074,46261,46328,46362
|
||||
# 6G K values for 11AZ
|
||||
az_offset_perbw_6g=0,0,0,0,0
|
||||
az_160mkval_6g=13313,12772,13233,13233,13525,13233,13233
|
||||
az_80mkval_6g=12150,12054,10236,11790,11639,11702,11702,11702,12193,12009,11884,11884,11884,11884
|
||||
az_40mkval_6g=17294,16270,16763,16505,15815,14806,15882,16717,16194,16066,16522,16138,16138,16138,16598,17219,16648,16889,16534,16687,15896,15993,15993,15993,15993,15993,15993,15993,15993
|
||||
az_low_20mkval_6g=46788,46239,45908,45320,45462,45998,45870,46330,45678,44962,44340,46036,45767,46061,45936,45888
|
||||
az_mid1_20mkval_6g=45761,45834,45997,45195,46005,46635,45753,45518,45518,45518,45518,45518,45518,46581,46121,46365
|
||||
az_mid2_20mkval_6g=46183,46890,46410,47017,46796,46276,45979,46298,46663,46456,46029,45569,45632,46386,46386,46386
|
||||
az_high_20mkval_6g=46386,46386,46386,46386,46386,46386,46386,46386,46386,46386,46386
|
||||
# Base K Values (For the VHT case 5G 160 & 5G80/40/20/2G20)
|
||||
proxd_basekival_5g_160=15539
|
||||
proxd_basektval_5g_160=15539
|
||||
proxd_basekival=12578,17825,47486,0
|
||||
proxd_basektval=12578,17825,47486,0
|
||||
# Offsets across channels (Upper nibble for target, lower nibble for initiator - saved in hex)
|
||||
proxd_160mkval=0x0101,0x0000
|
||||
proxd_80mkval=0x0202,0x0101,0x0000,0x0101,0x0505,0x0101
|
||||
proxd_40mkval=0x0303,0x0303,0x0202,0x0202,0x0000,0x0202,0x0202,0x0303,0x0505,0x0404,0x0202,0x0303
|
||||
proxd_20mkval=0x0505,0x0606,0x0505,0x0202,0x0202,0x0202,0x0101,0x0000,0x0404,0x0202,0x0505,0x0303,0x0101,0x0404,0x0404,0x0303,0x0505,0x0606,0x0606,0x0505,0x0505,0x0303,0x0404,0x0303,0x0303
|
||||
proxd_2gkval=0
|
||||
# Offsets across frame formats @ Initiator
|
||||
# Only for non-VHT frame (Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
# Delta between the base values are adjusted here
|
||||
proxdi_rate80m=0,0,0,0
|
||||
proxdi_rate40m=0,0,0,0
|
||||
proxdi_rate20m=0,0,0,0
|
||||
proxdi_rate2g=0,0,0,0
|
||||
proxdi_ack=0,0,0,0
|
||||
# Offsets across frame formats @ Responder
|
||||
proxdt_rate80m=0,0,0,0
|
||||
proxdt_rate40m=0,0,0,0
|
||||
proxdt_rate20m=0,0,0,0
|
||||
proxdt_rate2g=0,0,0,0
|
||||
proxdt_ack=0,0,0,0
|
||||
# Offsets for sub-bands (VHT, Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
proxd_sub80m40m=0,0,0,0,0
|
||||
proxd_sub80m20m=0,0,0,0,0
|
||||
proxd_sub40m20m=0,0,0,0,0
|
||||
proxd_sub80m40m_ch_off=-206,19525,18144,18762,22935,-230
|
||||
proxd_sub80m20m_ch_off=-194,9574,8212,9629,9695,-255
|
||||
proxd_sub40m20m_ch_off=-200,-119,-353,-1210,-1938,-1604,451,-68,-646,-1120,-218
|
||||
proxd_sub160m80m_ch_off=4741,7126
|
||||
proxd_sub160m40m_ch_off=18779,20913
|
||||
proxd_sub160m20m_ch_off=10464,11070
|
||||
|
||||
# olpc temp offset
|
||||
slice/1/olpc_tempslope2g=-78,-78
|
||||
olpc_tempslope5g=-78,-78
|
||||
olpc_tempslope6g=-78,-78
|
||||
@@ -0,0 +1,687 @@
|
||||
# nvram for USI G6 SKU3 module(4390B1) V2.7 2023.11.17
|
||||
# nvram copied and edited from bcm94390f10ref.txt
|
||||
# SSID generated using Alberto's boardssid.py script:
|
||||
#********************SUMMARY********************
|
||||
#Board Name: bcm94390b1GGmodUSIG6BB
|
||||
#SSID: 0x0afd
|
||||
#macmid: 0x05a4
|
||||
#Successfully made SSID entry in sromdefs.tcl.
|
||||
#Successfully made macmid entry in sromdefs.tcl.
|
||||
#Successfully made SSID entry in tblssid.py.
|
||||
#*************************************************
|
||||
# $ Copyright Broadcom $
|
||||
#
|
||||
#
|
||||
# <<Broadcom-WL-IPTag/Vendor1007>>
|
||||
#
|
||||
#
|
||||
#
|
||||
NVRAMRev=$Rev: 947350 $
|
||||
#
|
||||
#
|
||||
sromrev=11
|
||||
boardrev=0x1207
|
||||
boardtype=0x0afd
|
||||
boardflags=0x10401001
|
||||
boardflags2=0x00800000
|
||||
boardflags3=0x40002900
|
||||
boardflags4=0x200000
|
||||
#boardnum=57410
|
||||
macaddr=00:90:4c:5a:40:01
|
||||
jtag_irw=38
|
||||
|
||||
#Regulatory specific
|
||||
ccode=0
|
||||
regrev=0
|
||||
|
||||
# Board specific
|
||||
vendid=0x14e4
|
||||
devid=0x4438
|
||||
manfid=0x2d0
|
||||
antswitch=0
|
||||
pdgain5g=0
|
||||
pdgain2g=0
|
||||
aa2g=3
|
||||
aa5g=3
|
||||
agbg0=0
|
||||
agbg1=0
|
||||
aga0=0
|
||||
aga1=0
|
||||
ag6ga0=0
|
||||
ag6ga1=0
|
||||
extpagain5g=0
|
||||
slice/1/extpagain2g=0
|
||||
rxgains2gelnagaina0=16
|
||||
rxgains2gtrisoa0=17
|
||||
rxgains2gtrelnabypa0=1
|
||||
rxgains5gelnagaina0=15
|
||||
rxgains5gtrisoa0=17
|
||||
rxgains5gtrelnabypa0=1
|
||||
rxgains5gmelnagaina0=15
|
||||
rxgains5gmtrisoa0=17
|
||||
rxgains5gmtrelnabypa0=1
|
||||
rxgains5ghelnagaina0=15
|
||||
rxgains5ghtrisoa0=17
|
||||
rxgains5ghtrelnabypa0=1
|
||||
rxgains2gelnagaina1=16
|
||||
rxgains2gtrisoa1=17
|
||||
rxgains2gtrelnabypa1=1
|
||||
rxgains5gelnagaina1=15
|
||||
rxgains5gtrisoa1=17
|
||||
rxgains5gtrelnabypa1=1
|
||||
rxgains5gmelnagaina1=15
|
||||
rxgains5gmtrisoa1=17
|
||||
rxgains5gmtrelnabypa1=1
|
||||
rxgains5ghelnagaina1=15
|
||||
rxgains5ghtrisoa1=17
|
||||
rxgains5ghtrelnabypa1=1
|
||||
|
||||
rxgains2gfelossa0=2
|
||||
rxgains2gfelossa1=2
|
||||
rxgains5gfelossa0=2
|
||||
rxgains5gfelossa1=2
|
||||
rxgains5gmfelossa0=1
|
||||
rxgains5gmfelossa1=1
|
||||
rxgains5ghfelossa0=1
|
||||
rxgains5ghfelossa1=1
|
||||
rxgains5gbkoffa0=9
|
||||
rxgains5gbkoffa1=9
|
||||
|
||||
rxgains6gelnagaina0=15
|
||||
rxgains6gtrisoa0=17
|
||||
rxgains6gtrelnabypa0=1
|
||||
rxgains6gmelnagaina0=15
|
||||
rxgains6gmtrisoa0=17
|
||||
rxgains6gmtrelnabypa0=1
|
||||
rxgains6ghelnagaina0=15
|
||||
rxgains6ghtrisoa0=17
|
||||
rxgains6ghtrelnabypa0=1
|
||||
rxgains6gfelossa0=1
|
||||
#rxgains6gbkoffa0=16
|
||||
|
||||
rxgains6gelnagaina1=15
|
||||
rxgains6gtrisoa1=17
|
||||
rxgains6gtrelnabypa1=1
|
||||
rxgains6gmelnagaina1=15
|
||||
rxgains6gmtrisoa1=17
|
||||
rxgains6gmtrelnabypa1=1
|
||||
rxgains6ghelnagaina1=15
|
||||
rxgains6ghtrisoa1=17
|
||||
rxgains6ghtrelnabypa1=1
|
||||
rxgains6gfelossa1=1
|
||||
#rxgains6gbkoffa1=16
|
||||
|
||||
#RSSI related for dedicated mode in qdBm (Calibrated on USI 60 pin EVB 2023/10/31)
|
||||
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
|
||||
rssi_cal_rev=1
|
||||
rxgaincal_rssical=1
|
||||
rssi_delta_2gb0=1,2,2,0,1,2,2,0,0,4,2,1,0,4,2,1
|
||||
rssi_delta_2gb1=1,2,2,0,1,2,2,0,1,4,2,1,1,4,2,1
|
||||
rssi_delta_2gb2=1,2,2,0,1,2,2,0,0,4,2,1,0,4,2,1
|
||||
rssi_delta_2gb3=1,2,2,0,1,2,2,0,1,5,3,1,1,5,3,1
|
||||
rssi_delta_2gb4=1,2,2,0,1,2,2,0,1,5,3,2,1,5,3,2
|
||||
rssi_delta_2gb0_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb1_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb2_fbc=0,1,2,0,0,1,2,0,0,1,2,0,0,1,2,0
|
||||
rssi_delta_2gb3_fbc=1,1,2,0,1,1,2,0,1,1,2,0,1,1,2,0
|
||||
rssi_delta_2gb4_fbc=1,2,2,0,1,2,2,0,1,2,2,0,1,2,2,0
|
||||
rssi_delta_5gl=-10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -10, 1, -6, -5, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6, -13, 1, -8, -6
|
||||
rssi_delta_5gml=-5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 5, -2, -1, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2, -5, 8, 0, 2
|
||||
rssi_delta_5gmu=-6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -6, 6, -1, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0, -8, 7, -2, 0
|
||||
rssi_delta_5gh=-5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -5, 7, 1, 2, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1, -8, 7, -2, 1
|
||||
rssi_delta_6gb0=-6,8,2,3,-6,8,2,3,-6,8,2,3,-6,8,2,3,-8,8,1,3,-8,8,1,3,-8,8,1,3,-8,8,1,3
|
||||
rssi_delta_6gb1=-6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -6, 9, 3, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4, -7, 10, 2, 4
|
||||
rssi_delta_6gb2=-3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -3, 12, 6, 7, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5, -6, 11, 4, 5
|
||||
rssi_delta_6gb3=-3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -3, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6, -4, 12, 6, 6
|
||||
rssi_delta_6gb4=0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 0, 13, 9, 8, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11, 3, 16, 11, 11
|
||||
rssi_delta_6gb5=1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 1, 14, 10, 9, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10, 2, 14, 10, 10
|
||||
slice/2/rssicorrnorm5g_c0=3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3
|
||||
slice/2/rssicorrnorm6g_c0=8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8
|
||||
slice/1/tone_to_pkt_rssi_offset=-4,-4,-4,-4
|
||||
tone_to_pkt_rssi_offset=-12,-8,-12,-8,-8,-8,-8,-4,-12,-8,-12,-8,-8,-8,-8,-4
|
||||
tone_to_pkt_rssi_offset_6g=-8,-8,-8,-8,-8,-8,-8,-4,-8,-8,-8,-8,-8,-8,-8,-4
|
||||
gain_cal_temp=36
|
||||
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl=0,0
|
||||
rxgain_tempcoeff5gml=0,0
|
||||
rxgain_tempcoeff5gmu=0,0
|
||||
rxgain_tempcoeff5gh=0,0
|
||||
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
|
||||
rxgain_tempcoeff5gl_elnaoff=0,0
|
||||
rxgain_tempcoeff5gml_elnaoff=0,0
|
||||
rxgain_tempcoeff5gmu_elnaoff=0,0
|
||||
rxgain_tempcoeff5gh_elnaoff=0,0
|
||||
|
||||
#TSSI Related
|
||||
low_adc_rate_en=0
|
||||
slice/1/low_adc_rate_en=0
|
||||
|
||||
# 5G K values for 11AZ Update20240506
|
||||
az_offset_perbw=0,0,0,0,0
|
||||
az_160mkval=13737,14382
|
||||
az_80mkval=12621,11747,12891,12307,12541,12500
|
||||
az_40mkval=18345,17772,17749,17042,18066,18821,18682,17671,18330,17408,17483,17593
|
||||
az_20mkval=47443,47052,46332,46341,45992,46793,45675,46296,47196,47288,47311,47001,46873,47148,46399,45777,46325,46876,46793,45582,46126,46074,46261,46328,46362
|
||||
# 6G K values for 11AZ
|
||||
az_offset_perbw_6g=0,0,0,0,0
|
||||
az_160mkval_6g=13313,12772,13233,13233,13525,13233,13233
|
||||
az_80mkval_6g=12150,12054,10236,11790,11639,11702,11702,11702,12193,12009,11884,11884,11884,11884
|
||||
az_40mkval_6g=17294,16270,16763,16505,15815,14806,15882,16717,16194,16066,16522,16138,16138,16138,16598,17219,16648,16889,16534,16687,15896,15993,15993,15993,15993,15993,15993,15993,15993
|
||||
az_low_20mkval_6g=46788,46239,45908,45320,45462,45998,45870,46330,45678,44962,44340,46036,45767,46061,45936,45888
|
||||
az_mid1_20mkval_6g=45761,45834,45997,45195,46005,46635,45753,45518,45518,45518,45518,45518,45518,46581,46121,46365
|
||||
az_mid2_20mkval_6g=46183,46890,46410,47017,46796,46276,45979,46298,46663,46456,46029,45569,45632,46386,46386,46386
|
||||
az_high_20mkval_6g=46386,46386,46386,46386,46386,46386,46386,46386,46386,46386,46386
|
||||
|
||||
# Base K Values (For the VHT case 5G 160 & 5G80/40/20/2G20)
|
||||
proxd_basekival_5g_160=15539
|
||||
proxd_basektval_5g_160=15539
|
||||
proxd_basekival=12578,17825,47486,0
|
||||
proxd_basektval=12578,17825,47486,0
|
||||
# Offsets across channels (Upper nibble for target, lower nibble for initiator - saved in hex)
|
||||
proxd_160mkval=0x0101,0x0000
|
||||
proxd_80mkval=0x0202,0x0101,0x0000,0x0101,0x0505,0x0101
|
||||
proxd_40mkval=0x0303,0x0303,0x0202,0x0202,0x0000,0x0202,0x0202,0x0303,0x0505,0x0404,0x0202,0x0303
|
||||
proxd_20mkval=0x0505,0x0606,0x0505,0x0202,0x0202,0x0202,0x0101,0x0000,0x0404,0x0202,0x0505,0x0303,0x0101,0x0404,0x0404,0x0303,0x0505,0x0606,0x0606,0x0505,0x0505,0x0303,0x0404,0x0303,0x0303
|
||||
proxd_2gkval=0
|
||||
# Offsets across frame formats @ Initiator
|
||||
# Only for non-VHT frame (Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
# Delta between the base values are adjusted here
|
||||
proxdi_rate80m=0,0,0,0
|
||||
proxdi_rate40m=0,0,0,0
|
||||
proxdi_rate20m=0,0,0,0
|
||||
proxdi_rate2g=0,0,0,0
|
||||
proxdi_ack=0,0,0,0
|
||||
# Offsets across frame formats @ Responder
|
||||
proxdt_rate80m=0,0,0,0
|
||||
proxdt_rate40m=0,0,0,0
|
||||
proxdt_rate20m=0,0,0,0
|
||||
proxdt_rate2g=0,0,0,0
|
||||
proxdt_ack=0,0,0,0
|
||||
# Offsets for sub-bands (VHT, Leg6, Leg non-6, mcs0, non-mcs0)
|
||||
proxd_sub80m40m=0,0,0,0,0
|
||||
proxd_sub80m20m=0,0,0,0,0
|
||||
proxd_sub40m20m=0,0,0,0,0
|
||||
proxd_sub80m40m_ch_off=-206,19525,18144,18762,22935,-230
|
||||
proxd_sub80m20m_ch_off=-194,9574,8212,9629,9695,-255
|
||||
proxd_sub40m20m_ch_off=-200,-119,-353,-1210,-1938,-1604,451,-68,-646,-1120,-218
|
||||
proxd_sub160m80m_ch_off=4741,7126
|
||||
proxd_sub160m40m_ch_off=18779,20913
|
||||
proxd_sub160m20m_ch_off=10464,11070
|
||||
|
||||
nocrc=1
|
||||
otpimagesize=502
|
||||
xtalfreq=76800
|
||||
txchain=3
|
||||
rxchain=3
|
||||
|
||||
## --- 11b ANT selection Diversity ---
|
||||
cck_onecore_tx=1
|
||||
cckdigfilttype=0
|
||||
bandcap=6
|
||||
slice/1/bandcap=1
|
||||
slice/3/bandcap=1
|
||||
|
||||
#FDSS Related
|
||||
fdss_level_5g=0,0
|
||||
fdss_level_6g=0,0
|
||||
slice/1/fdss_level_2g=0,0
|
||||
slice/1/fdss_bandedge_2g_en=1
|
||||
slice/1/fdss_profile_2g=7,0,0,5,17,28,36,47,59,152,-90,-320,-140,0,140,320,90,128
|
||||
slice/1/fdss_profile_2g_ch13=8,0,0,5,17,24,28,36,47,59,151,-90,-320,-140,132,-136,140,320,90,128
|
||||
slice/1/fdss_profile_11ax_2g=7,0,0,28,88,120,136,168,228,147,-20,-64,-32,0,32,64,20,128,128
|
||||
slice/1/fdss_profile_11ax_2g_ch13=8,0,0,28,88,112,128,136,168,228,147,-20,-64,8,120,-392,32,64,20,128,128
|
||||
|
||||
paprdis=1
|
||||
slice/1/paprdis=1
|
||||
slice/1/txshaper_en=1
|
||||
#Tempsense Related
|
||||
tempthresh=255
|
||||
tempoffset=32
|
||||
rawtempsense=0x1ff
|
||||
phycal_tempdelta=15
|
||||
temps_period=15
|
||||
temps_hysteresis=0xf
|
||||
|
||||
#olpc
|
||||
olpc_idx_in_use=1
|
||||
disable_olpc=1
|
||||
olpc_thresh5g=40
|
||||
olpc_anchor5g=40
|
||||
olpc_anchor6g=40
|
||||
olpc_thresh6g=40
|
||||
slice/1/olpc_idx_in_use=1
|
||||
slice/1/disable_olpc=1
|
||||
slice/1/olpc_thresh2g=40
|
||||
slice/1/olpc_anchor2g=40
|
||||
slice/1/olpc_thresh2g_hi=0x7f7f
|
||||
|
||||
# olpc temp offset
|
||||
slice/1/olpc_tempslope2g=-78,-78
|
||||
olpc_tempslope5g=-78,-78
|
||||
olpc_tempslope6g=-78,-78
|
||||
|
||||
# 20231218 Updated on the module socket board
|
||||
hwolpc_offset_c0=0x00,0x03FFFF01,0x03FF0001,0x02FEFF00,0x02FF0101
|
||||
hwolpc_offset6g_c0=0x00FE0000,0x04000000,0x01000001,0x02FF0100,0x02FF0000,0x03FF0000
|
||||
hwolpc_offset_c1=0xFF,0x02FF0000,0x02FEFF00,0x03FF0000,0x02FF0001
|
||||
hwolpc_offset6g_c1=0x02FF0100,0x04000001,0x02FFFFFF,0x04000201,0x03000101,0x03FF0101
|
||||
# Disable Idle TSSI for both Aux and Main slice
|
||||
idletssi_disable=1
|
||||
disable_tpc=0
|
||||
|
||||
### To delay TSSI sampling, in nvram:
|
||||
tssisampledelayen=1
|
||||
|
||||
tssipos2g=1
|
||||
tssipos5g=0
|
||||
|
||||
etssi_inv_gain=357,357,300,300
|
||||
AvVmid_c0=0,178,0,178,0,179,0,185,0,191
|
||||
AvVmid_c1=0,180,0,180,0,181,0,186,0,191
|
||||
AvVmid_6g_c0=0,194,0,199,0,200,0,200,0,202,0,202
|
||||
AvVmid_6g_c1=0,194,0,200,0,200,0,201,0,205,0,203
|
||||
slice/1/AvVmid_c0=0,158
|
||||
slice/1/AvVmid_c1=0,165
|
||||
|
||||
pacalver_nvram=0x1
|
||||
pacal_pwroffseta0=0,1,3,3,-1,2,4,3,5,5,8
|
||||
pacal_pwroffseta1=0,-2,0,0,1,6,1,1,2,5,5
|
||||
|
||||
|
||||
# 20231211 adjust PA slope by BRCM
|
||||
## 2024/01/22 Shifted
|
||||
slice/1/pa2ga0=117,9077,-1054
|
||||
slice/1/pa2ga1=56,9311,-1072
|
||||
|
||||
# 2024/01/22 Shifted
|
||||
pa5ga0=77,8030,-1137,76,8056,-1168,88,8380,-1128,67,8226,-1122
|
||||
pa5ga1=80,8208,-1136,99,8327,-1173,94,8390,-1137,82,8359,-1133
|
||||
|
||||
# 2024/01/22 Shifted
|
||||
pa6ga0=94,8381,-1118,87,8380,-1132,96,8390,-1110,102,8419,-1131,94,8384,-1118,100,8267,-1149
|
||||
pa6ga1=134,8548,-1117,112,8512,-1147,94,8347,-1132,92,8472,-1133,101,8328,-1150,75,8149,-1152
|
||||
|
||||
# Max power and offsets
|
||||
slice/1/powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/powoffs2gtna1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffsetcckma0=3
|
||||
slice/1/pdoffsetcckma1=3
|
||||
|
||||
maxp2ga0=98
|
||||
maxp2ga1=95
|
||||
maxp5ga0=88,87,90,90
|
||||
maxp5ga1=90,90,91,89
|
||||
maxp6ga0=83,84,85,82,88,86
|
||||
maxp6ga1=83,86,86,86,88,85
|
||||
subband5gver=0x4
|
||||
subband6gver=0x3
|
||||
paparambwver=3
|
||||
|
||||
#11/21 updated on the module socket board
|
||||
pdoffset40ma0=0x6654
|
||||
pdoffset80ma0=0x4543
|
||||
pdoffset160ma0=0x5475
|
||||
pdoffset40ma1=0x5566
|
||||
pdoffset80ma1=0x4453
|
||||
pdoffset160ma1=0x5575
|
||||
pdoffset6g40ma0=0x666677
|
||||
pdoffset6g40ma1=0x556666
|
||||
pdoffset6g80ma0=0x556666
|
||||
pdoffset6g80ma1=0x554422
|
||||
pdoffset6g160ma0=0x445577
|
||||
pdoffset6g160ma1=0x556655
|
||||
|
||||
slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
|
||||
# 5G power offset per channel for band edge channel
|
||||
powoffs5g20mtna0=0,0,0,0,0,0,0
|
||||
powoffs5g20mtna1=0,0,0,0,0,0,0
|
||||
powoffs5g40mtna0=0,0,0,0,0
|
||||
powoffs5g40mtna1=0,0,0,0,0
|
||||
powoffs5g80mtna0=0,0,0,0,0
|
||||
powoffs5g80mtna1=0,0,0,0,0
|
||||
|
||||
#2G/5G related PPR params
|
||||
cckbw202gpo=0x0000
|
||||
mcsbw202gpo=0xDA975422
|
||||
dot11agofdmhrbw202gpo=0x7432
|
||||
ofdmlrbw202gpo=0x3000
|
||||
mcs1024qam2gpo=0x00
|
||||
mcsbw205glpo=0xCB975422
|
||||
mcsbw405glpo=0xFDA99655
|
||||
mcsbw805glpo=0xDBA88555
|
||||
mcsbw1605glpo=0xEDBBB888
|
||||
mcsbw205gmpo=0xBB975422
|
||||
mcsbw405gmpo=0xCB998655
|
||||
mcsbw805gmpo=0xBBA99777
|
||||
mcsbw1605gmpo=0xDDBBBAAA
|
||||
mcsbw205ghpo=0xA9753200
|
||||
mcsbw405ghpo=0x99766333
|
||||
mcsbw805ghpo=0xA9766444
|
||||
mcsbw1605ghpo=0xB8777554
|
||||
mcs1024qam5glpo=0x00FF22FF
|
||||
mcs1024qam5gmpo=0x00EE11DD
|
||||
mcs1024qam5ghpo=0x00CC11CB
|
||||
mcs4096qam5glpo=0x33335021
|
||||
mcs4096qam5gmpo=0x00000000
|
||||
mcs4096qam5ghpo=0x00000000
|
||||
|
||||
mcs8poexp=0
|
||||
mcs9poexp=0
|
||||
## For both 2G and 5G
|
||||
mcs10poexp=0xfff1fff1
|
||||
mcs11poexp=0xfff1fff1
|
||||
mcs12poexp=0xffffffff
|
||||
mcs13poexp=0xffffffff
|
||||
## 6G related PPR params
|
||||
mcsbw206gb1po=0xA8653200
|
||||
mcsbw406gb1po=0xA9875332
|
||||
mcsbw806gb1po=0xA9866444
|
||||
mcsbw1606gb1po=0xBA988555
|
||||
mcsbw206gb2po=0xA8653200
|
||||
mcsbw406gb2po=0xA9875332
|
||||
mcsbw806gb2po=0xA9866444
|
||||
mcsbw1606gb2po=0xBA988555
|
||||
mcsbw206gb3po=0xBA875422
|
||||
mcsbw406gb3po=0xBA976554
|
||||
mcsbw806gb3po=0xBA988666
|
||||
mcsbw1606gb3po=0xCCAAA777
|
||||
mcsbw206gb4po=0xBA875422
|
||||
mcsbw406gb4po=0xBA976554
|
||||
mcsbw806gb4po=0xBA988666
|
||||
mcsbw1606gb4po=0xCCAAA777
|
||||
mcsbw206gb5po=0xECA97644
|
||||
mcsbw406gb5po=0xDCBA9776
|
||||
mcsbw806gb5po=0xDCBBB999
|
||||
mcsbw1606gb5po=0xDDCCCAAA
|
||||
mcsbw206gb6po=0xECA97644
|
||||
mcsbw406gb6po=0xDCBA9776
|
||||
mcsbw806gb6po=0xDCBBB999
|
||||
mcsbw1606gb6po=0xDDCCCAAA
|
||||
mcs1024qam6gb1po=0xCCCCCBBB
|
||||
mcs1024qam6gb2po=0xCCCCCBBB
|
||||
mcs1024qam6gb3po=0xDDDDCCBB
|
||||
mcs1024qam6gb4po=0xDDDDCCBB
|
||||
mcs1024qam6gb5po=0xFFFFFFFF
|
||||
mcs1024qam6gb6po=0xFFFFFFFF
|
||||
mcs4096qam6gb1po=0x00000000
|
||||
mcs4096qam6gb2po=0x00000000
|
||||
mcs4096qam6gb3po=0x00000000
|
||||
mcs4096qam6gb4po=0x00000000
|
||||
mcs4096qam6gb5po=0x00000000
|
||||
mcs4096qam6gb6po=0x00000000
|
||||
|
||||
## For 6G only
|
||||
mcs10poexp6g=0x00000000
|
||||
mcs11poexp6g=0x00000000
|
||||
mcs12poexp6g=0xffffffff
|
||||
mcs13poexp6g=0xffffffff
|
||||
|
||||
## ULOFDMA Board limit PPRs for 2G20 ##
|
||||
ruppr2g20bpsk=0x1c718c63,0x070c31c7
|
||||
ruppr2g20qpsk=0x1c721084,0x071041c7
|
||||
ruppr2g20qam16=0x1c7294a5,0x071451c7
|
||||
ruppr2g20qam64=0x1c739ce7,0x071c71c7
|
||||
ruppr2g20qam256=0x1c76b5ad,0x0734d1c7
|
||||
ruppr2g20qam1024=0x1c78c631,0x074511c7
|
||||
ruppr2g20qam4096=0x1c739ce7,0x071c71c7
|
||||
## ULOFDMA Board limit PPRs for 5G20 ##
|
||||
ruppr5g20bpsk=0x08208421,0x02041082
|
||||
ruppr5g20qpsk=0x08210842,0x02082082
|
||||
ruppr5g20qam16=0x08218c63,0x020c3082
|
||||
ruppr5g20qam64=0x082294a5,0x02145082
|
||||
ruppr5g20qam256=0x0824a529,0x02249082
|
||||
ruppr5g20qam1024=0x0826b5ad,0x0234d082
|
||||
ruppr5g20qam4096=0x0828c631,0x02451082
|
||||
## ULOFDMA Board limit PPRs for 5G40 ##
|
||||
ruppr5g40bpsk=0x08318c63,0x030c3082
|
||||
ruppr5g40qpsk=0x08421084,0x04104082
|
||||
ruppr5g40qam16=0x085294a5,0x05145082
|
||||
ruppr5g40qam64=0x08842108,0x08208082
|
||||
ruppr5g40qam256=0x08b5ad6b,0x0b2cb082
|
||||
ruppr5g40qam1024=0x08d6b5ad,0x0d34d082
|
||||
ruppr5g40qam4096=0x09294a52,0x12492082
|
||||
## ULOFDMA Board limit PPRs for 5G80 ##
|
||||
ruppr5g80bpsk=0x10421084,0x04104082
|
||||
ruppr5g80qpsk=0x10421084,0x04104082
|
||||
ruppr5g80qam16=0x186318c6,0x06186082
|
||||
ruppr5g80qam64=0x20842108,0x08208082
|
||||
ruppr5g80qam256=0x2cb5ad6b,0x0b2cb082
|
||||
ruppr5g80qam1024=0x38e739ce,0x0e38e082
|
||||
ruppr5g80qam4096=0x49294a52,0x12492082
|
||||
## ULOFDMA Board limit PPRs for 5G160 ##
|
||||
ruppr5g160bpsk=0x1c739ce7,0x071c7087,0x020821c7
|
||||
ruppr5g160qpsk=0x1c739ce7,0x071c7087,0x020821c7
|
||||
ruppr5g160qam16=0x20842108,0x08208088,0x02082208
|
||||
ruppr5g160qam64=0x30c6318c,0x0c30c08c,0x0208230c
|
||||
ruppr5g160qam256=0x3cf7bdef,0x0f3cf08f,0x020823cf
|
||||
ruppr5g160qam1024=0x4518c631,0x11451091,0x02082451
|
||||
ruppr5g160qam4096=0x4d39ce73,0x134d3093,0x020824d3
|
||||
## ULOFDMA Board limit PPRs for 6G20 ##
|
||||
ruppr6g20bpsk=0x04108421,0x01041041
|
||||
ruppr6g20qpsk=0x04108421,0x01041041
|
||||
ruppr6g20qam16=0x04118c63,0x030c3041
|
||||
ruppr6g20qam64=0x04139ce7,0x071c7041
|
||||
ruppr6g20qam256=0x0414a529,0x09249041
|
||||
ruppr6g20qam1024=0x0415294a,0x0a28a041
|
||||
ruppr6g20qam4096=0x04184210,0x10410041
|
||||
## ULOFDMA Board limit PPRs for 6G40 ##
|
||||
ruppr6g40bpsk=0x04210842,0x02082041
|
||||
ruppr6g40qpsk=0x04318c63,0x030c3041
|
||||
ruppr6g40qam16=0x045294a5,0x05145041
|
||||
ruppr6g40qam64=0x04739ce7,0x071c7041
|
||||
ruppr6g40qam256=0x0494a529,0x09249041
|
||||
ruppr6g40qam1024=0x04c6318c,0x0c30c041
|
||||
ruppr6g40qam4096=0x0518c631,0x11451041
|
||||
## ULOFDMA Board limit PPRs for 6G80 ##
|
||||
ruppr6g80bpsk=0x0c318c63,0x030c3041
|
||||
ruppr6g80qpsk=0x145294a5,0x05145041
|
||||
ruppr6g80qam16=0x1c739ce7,0x071c7041
|
||||
ruppr6g80qam64=0x28a5294a,0x0a28a041
|
||||
ruppr6g80qam256=0x30c6318c,0x0c30c041
|
||||
ruppr6g80qam1024=0x38e739ce,0x0e38e041
|
||||
ruppr6g80qam4096=0x49294a52,0x12492041
|
||||
## ULOFDMA Board limit PPRs for 6G160 ##
|
||||
ruppr6g160bpsk=0x186318c6,0x06186046,0x01041186
|
||||
ruppr6g160qpsk=0x1c739ce7,0x071c7047,0x010411c7
|
||||
ruppr6g160qam16=0x2494a529,0x09249049,0x01041249
|
||||
ruppr6g160qam64=0x28a5294a,0x0a28a04a,0x0104128a
|
||||
ruppr6g160qam256=0x30c6318c,0x0c30c04c,0x0104130c
|
||||
ruppr6g160qam1024=0x38e739ce,0x0e38e04e,0x0104138e
|
||||
ruppr6g160qam4096=0x49294a52,0x12492052,0x01041492
|
||||
|
||||
#OOB params
|
||||
#device_wake_opt=1
|
||||
host_wake_opt=0
|
||||
# temporarily disable deepsleep health check
|
||||
ds_hc_enable=0
|
||||
|
||||
# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
|
||||
# RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
|
||||
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
|
||||
# RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)
|
||||
|
||||
# 5G Main SWCTRL
|
||||
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G Main SWCTRL
|
||||
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
|
||||
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G Aux SWCTRL
|
||||
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
|
||||
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# 5G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 6G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
|
||||
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF
|
||||
|
||||
# 2G WL Scan SWCTRL
|
||||
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
|
||||
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF
|
||||
|
||||
# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
|
||||
fem_table_init_val=0x00010001,0x00040024,0x00040024
|
||||
fem_table_init_val_ext=0x00,0x00,0x00
|
||||
|
||||
# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
|
||||
clb5gslice0core0=0x10024
|
||||
clb5gslice0core1=0x10024
|
||||
clb5gslice2core0=0x10024
|
||||
clb5gslice2core1=0x10024
|
||||
|
||||
clb2gslice1core0=0x08001
|
||||
clb2gslice1core1=0x08001
|
||||
clb2gslice2core0=0x08001
|
||||
clb2gslice2core1=0x08001
|
||||
|
||||
# rfem CMAPT
|
||||
rFEM_hw_mppc_en_2g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_2g=-128,20
|
||||
slice/1/mppc_gaindelta_pa1=42
|
||||
|
||||
rFEM_hw_mppc_en_5g=1
|
||||
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,12
|
||||
mppc_gaindelta_pa1=0,31,28,30,29,28,25,26,24,30,27
|
||||
|
||||
# Gen9 5G/6G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
|
||||
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
|
||||
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
|
||||
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
|
||||
remoteFEMlut_5g=0x93938181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989
|
||||
|
||||
# Gen9 2G rFEM States:
|
||||
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
|
||||
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
|
||||
remoteFEMlut_2g=0x80808181, 0x00008383, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000
|
||||
|
||||
# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
|
||||
rFEM_2G_type=2
|
||||
rFEM_5G_type=2
|
||||
|
||||
# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
|
||||
# 23 is actual line but GCI needs 23+4
|
||||
# 22 is actual line but GCI needs 22+4
|
||||
rFEM_VIO_swctrl=27,10,26,9
|
||||
|
||||
# Drives strength of core 0,1 rffe pads at attach
|
||||
rffe_drive_strength_init=0x2
|
||||
|
||||
muxenab=1
|
||||
|
||||
# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
|
||||
fuart_sig2pin_map=0x0b0a0908
|
||||
|
||||
###Comment out BT section for initial bringup
|
||||
#BT Coex
|
||||
btc_mode=0x1
|
||||
#btc_params82=0x1a0
|
||||
# BT shared ant configuration
|
||||
btc_prisel_ant_mask=0x0
|
||||
btc_prisel_mask=0x1
|
||||
clb_swctrl_smask_ant0=0x18025
|
||||
clb_swctrl_smask_ant1=0x18025
|
||||
|
||||
# energy detect threshold
|
||||
ed_thresh2g=-63
|
||||
ed_thresh5g=-63
|
||||
ed_thresh6g=-71,-71
|
||||
ed_thresh_sec5g=-72
|
||||
ed_thresh_sec6g=-71,-71
|
||||
# energy detect threshold for EU
|
||||
eu_edthresh2g=-59
|
||||
eu_edthresh5g=-65
|
||||
eu_edthresh6g=-68,-59
|
||||
eu_edthresh_sec5g=-64
|
||||
eu_edthresh_sec6g=-69,-59
|
||||
|
||||
#Feature flags
|
||||
femctrl=17
|
||||
|
||||
# FE Loss comp parameters
|
||||
slice/1/felossTx2ga0=7,7,7,7,7,7,7,7,8,8,10,11,11,11
|
||||
slice/1/felossTx2ga1=6,6,6,6,6,6,6,6,6,8,8,8,8,8
|
||||
slice/1/felossRx2ga0=4,4,4,4,8,8,8,8,8,6,6,6,6,6
|
||||
slice/1/felossRx2ga1=4,4,4,4,6,6,6,6,6,4,4,4,4,4
|
||||
felossTx5ga0=12,10,12,11
|
||||
felossTx5ga1=12,9,9,8
|
||||
felossRx5ga0=11,12,8,11
|
||||
felossRx5ga1=9,9,4,8
|
||||
felossTx6ga0=8,9,10,7,15,13
|
||||
felossTx6ga1=5,8,9,9,10,7
|
||||
felossRx6ga0=9,10,8,8,7,11
|
||||
felossRx6ga1=8,8,8,12,5,6
|
||||
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||
slice/2/felossRx5ga0=0,0,0,0
|
||||
slice/2/felossRx5ga1=0,0,0,0
|
||||
slice/2/felossRx6ga0=0,0,0,0,0,0
|
||||
slice/2/felossRx6ga1=0,0,0,0,0,0
|
||||
|
||||
# Spur canceller DTX spurs for some channels in Main slice
|
||||
txspurcan_en=1
|
||||
slice/1/txspurcan_en=0
|
||||
|
||||
# PAPDcal params
|
||||
papd_multi_lut_en=0
|
||||
epacal5g=1
|
||||
|
||||
# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
|
||||
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
|
||||
abuck_volt=5
|
||||
slice/1/abuck_volt=5
|
||||
slice/2/abuck_volt=5
|
||||
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
|
||||
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
|
||||
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
|
||||
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
|
||||
#cbuck_volt=21
|
||||
|
||||
##Dynamic SAR related Params
|
||||
dynsar_fcc_rev=0xFF
|
||||
|
||||
###LPC EPABYPASS MODE
|
||||
lpc_epabypass_en=1
|
||||
lpc_epabypass_maxpwr=-10
|
||||
lpc_epagain=60
|
||||
|
||||
#LESI desense
|
||||
lesi_desoffset=49,48,48
|
||||
lesi_desoffset_20MHzextra=1,1,1
|
||||
|
||||
#scan5g elnabyp
|
||||
slice/2/scan_ebyp_ncc=1
|
||||
|
||||
#tvpm params
|
||||
tvpm=1
|
||||
slice/1/tvpm=1
|
||||
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1
|
||||
|
||||
## List of duty cycle temperature thresholds in descending order (num = 3)
|
||||
tvpm_dc_temp_threshold=110,105,100
|
||||
slice/1/tvpm_dc_temp_threshold=110,105,100
|
||||
|
||||
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|
||||
[build-info]
|
||||
date = 2025-11-05T05:45:22+00:00
|
||||
user = android-build
|
||||
uname = "Linux r-abefe6b4c3ef0adb-twlp 5.15.0-1013-gcp #18~20.04.1-Ubuntu SMP Sun Jul 3 08:20:07 UTC 2022 x86_64 x86_64 x86_64 GNU/Linux"
|
||||
modem = e2f8ffd27e776593b1512975206b0b9459b319a3
|
||||
config = 027d306d50cfd9d5bd448cb8dbd0df33f0fcaabf
|
||||
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|
||||
376fa12c784602b9111f71cc69815c46958e752583f76bbfb7165c75
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||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
v1.0Comcast-cbrs.sim1" ç¥ñ·€€"
|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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||||
|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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|
||||
|
||||
v1.0unitedwireless_us.sim1" §搔
|
||||
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|
||||
|
||||
v1.0telia_se.multislot" Řó…X"
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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|
||||
|
||||
v1.0␍rogers.common" °ïÚ6
|
||||
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|
||||
|
||||
v1.0tdc_dk.multislot" Řó…X"
|
||||
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|
||||
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|
||||
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|
||||
|
||||
v1.0nos_pt.multislot" Øó…X"
|
||||
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|
||||
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|
||||
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+3
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|
||||
|
||||
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|
||||
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|
||||
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+4
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|
||||
|
||||
v1.0 masmovil_es"
|
||||
牽贾"暇实"
|
||||
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|
||||
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