#============================================================================= # Copyright (c) 2020-2021 Qualcomm Technologies, Inc. # All Rights Reserved. # Confidential and Proprietary - Qualcomm Technologies, Inc. # # Copyright (c) 2009-2012, 2014-2019, The Linux Foundation. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions are met: # * Redistributions of source code must retain the above copyright # notice, this list of conditions and the following disclaimer. # * Redistributions in binary form must reproduce the above copyright # notice, this list of conditions and the following disclaimer in the # documentation and/or other materials provided with the distribution. # * Neither the name of The Linux Foundation nor # the names of its contributors may be used to endorse or promote # products derived from this software without specific prior written # permission. # # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE # IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND # NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR # CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, # PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; # OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, # WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR # OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF # ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #============================================================================= ddr_type=`od -An -tx /proc/device-tree/memory/ddr_device_type` ddr_type4="07" ddr_type5="08" # Disable Core control on silver echo 0 > /sys/devices/system/cpu/cpu0/core_ctl/enable # Core control parameters for gold echo 2 > /sys/devices/system/cpu/cpu4/core_ctl/min_cpus echo 60 > /sys/devices/system/cpu/cpu4/core_ctl/busy_up_thres echo 30 > /sys/devices/system/cpu/cpu4/core_ctl/busy_down_thres echo 100 > /sys/devices/system/cpu/cpu4/core_ctl/offline_delay_ms echo 3 > /sys/devices/system/cpu/cpu4/core_ctl/task_thres # Setting b.L scheduler parameters echo 65 > /proc/sys/walt/sched_downmigrate echo 71 > /proc/sys/walt/sched_upmigrate echo 85 > /proc/sys/walt/sched_group_downmigrate echo 100 > /proc/sys/walt/sched_group_upmigrate echo 2 > /proc/sys/walt/sched_window_stats_policy echo 1 > /proc/sys/walt/sched_walt_rotate_big_tasks echo 0 > /proc/sys/walt/sched_coloc_busy_hysteresis_enable_cpus # cpuset parameters echo 0-3 > /dev/cpuset/background/cpus echo 0-3 > /dev/cpuset/system-background/cpus # Turn off scheduler boost at the end echo 0 > /proc/sys/walt/sched_boost # Reset the RT boost, which is 1024 (max) by default. echo 0 > /proc/sys/kernel/sched_util_clamp_min_rt_default # configure governor settings for silver cluster echo "walt" > /sys/devices/system/cpu/cpufreq/policy0/scaling_governor echo 0 > /sys/devices/system/cpu/cpufreq/policy0/walt/down_rate_limit_us echo 0 > /sys/devices/system/cpu/cpufreq/policy0/walt/up_rate_limit_us echo 1110000 > /sys/devices/system/cpu/cpufreq/policy0/walt/hispeed_freq echo 691200 > /sys/devices/system/cpu/cpufreq/policy0/scaling_min_freq echo 85 > /sys/devices/system/cpu/cpufreq/policy0/walt/hispeed_load echo 0 > /sys/devices/system/cpu/cpufreq/policy0/walt/pl # configure governor settings for gold cluster echo "walt" > /sys/devices/system/cpu/cpufreq/policy4/scaling_governor echo 0 > /sys/devices/system/cpu/cpufreq/policy4/walt/down_rate_limit_us echo 0 > /sys/devices/system/cpu/cpufreq/policy4/walt/up_rate_limit_us echo 1190000 > /sys/devices/system/cpu/cpufreq/policy4/walt/hispeed_freq echo 691200 > /sys/devices/system/cpu/cpufreq/policy4/scaling_min_freq echo 85 > /sys/devices/system/cpu/cpufreq/policy4/walt/hispeed_load echo -6 > /sys/devices/system/cpu/cpufreq/policy4/walt/boost echo 0 > /sys/devices/system/cpu/cpufreq/policy4/walt/rtg_boost_freq echo 0 > /sys/devices/system/cpu/cpufreq/policy4/walt/pl # configure input boost settings echo 1110000 0 0 0 0 0 0 0 > /proc/sys/walt/input_boost/input_boost_freq echo 120 > /proc/sys/walt/input_boost/input_boost_ms #MIUI ADD: Performance_BoostFramework echo 1958400 0 0 0 2400000 0 0 0 > /proc/sys/walt/input_boost/powerkey_input_boost_freq echo 400 > /proc/sys/walt/input_boost/powerkey_input_boost_ms echo 1 > /proc/sys/walt/input_boost/powerkey_sched_boost_on_input #END Performance_BoostFramework # colocation V3 settings echo 614400 > /sys/devices/system/cpu/cpufreq/policy0/walt/rtg_boost_freq echo 51 > /proc/sys/walt/sched_min_task_util_for_boost echo 35 > /proc/sys/walt/sched_min_task_util_for_colocation echo 20000000 > /proc/sys/walt/sched_task_unfilter_period # Enable conservative pl echo 1 > /proc/sys/walt/sched_conservative_pl # N16 set watermark_scale_factor && set swappiness 120 ProductName=`getprop ro.product.name` if [ "$ProductName" == "garnet" ] ; then echo 20 > /proc/sys/vm/watermark_scale_factor echo 120 > /proc/sys/vm/swappiness fi # configure bus-dcvs bus_dcvs="/sys/devices/system/cpu/bus_dcvs" for device in $bus_dcvs/* do cat $device/hw_min_freq > $device/boost_freq done for ddrbw in $bus_dcvs/DDR/*bwmon-ddr do if [ ${ddr_type:4:2} == $ddr_type4 ]; then echo "1144 1720 2086 2929 3879 5161 5931 6515 8136" > $ddrbw/mbps_zones elif [ ${ddr_type:4:2} == $ddr_type5 ]; then echo "1720 2086 2929 3879 5931 6515 7980 12191" > $ddrbw/mbps_zones fi echo 4 > $ddrbw/sample_ms echo 68 > $ddrbw/io_percent echo 20 > $ddrbw/hist_memory echo 80 > $ddrbw/down_thres echo 0 > $ddrbw/guard_band_mbps echo 250 > $ddrbw/up_scale echo 1600 > $ddrbw/idle_mbps echo 48 > $ddrbw/window_ms done for l3gold in $bus_dcvs/L3/*gold do echo 4000 > $l3gold/ipm_ceil echo 60 > $l3gold/wb_pct_thres done for qosgold in $bus_dcvs/DDRQOS/*gold do echo 4000 > $qosgold/ipm_ceil done #set s2idle as default suspend mode echo s2idle > /sys/power/mem_sleep # Enable LPM echo N > /sys/devices/system/cpu/qcom_lpm/parameters/sleep_disabled # Let kernel know our image version/variant/crm_version if [ -f /sys/devices/soc0/select_image ]; then image_version="10:" image_version+=`getprop ro.build.id` image_version+=":" image_version+=`getprop ro.build.version.incremental` image_variant=`getprop ro.product.name` image_variant+="-" image_variant+=`getprop ro.build.type` oem_version=`getprop ro.build.version.codename` echo 10 > /sys/devices/soc0/select_image echo $image_version > /sys/devices/soc0/image_version echo $image_variant > /sys/devices/soc0/image_variant echo $oem_version > /sys/devices/soc0/image_crm_version fi # Change console log level as per console config property console_config=`getprop persist.vendor.console.silent.config` case "$console_config" in "1") echo "Enable console config to $console_config" echo 0 > /proc/sys/kernel/printk ;; *) echo "Enable console config to $console_config" ;; esac setprop vendor.post_boot.parsed 1